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drm/amd/display: Fix silence signed/unsigned mismatch warnings in dml

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[Why & How]
Fix signed/unsigned mismatch warnings by using the same signedness for a
given value

Reviewed-by: Austin Zheng <austin.zheng@amd.com>
Signed-off-by: Clay King <clayking@amd.com>
Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Clay King 2026-03-16 17:37:31 -04:00 committed by Alex Deucher
parent 26ebcac056
commit 5efcf63aa6
3 changed files with 8 additions and 7 deletions
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1
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.h
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@ -74,6 +74,7 @@ unsigned int dcn42_get_max_clock_khz(struct clk_mgr *clk_mgr_base, enum clk_type
bool dcn42_is_smu_present(struct clk_mgr *clk_mgr_base);
bool dcn42_has_active_display(struct dc *dc, const struct dc_state *context);
int dcn42_get_active_display_cnt_wa(struct dc *dc, struct dc_state *context, int *all_active_disps);
bool dcn42_has_active_display(struct dc *dc, const struct dc_state *context);
void dcn42_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr, struct dc_state *context, bool safe_to_lower);
void dcn42_update_clocks_update_dtb_dto(struct clk_mgr_internal *clk_mgr, struct dc_state *context, int ref_dtbclk_khz);
bool dcn42_is_spll_ssc_enabled(struct clk_mgr *clk_mgr_base);

10
drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c
View File

@ -35,7 +35,7 @@
#define MAX_MPCC_FACTOR 4
struct dc_plane_pipe_pool {
int pipes_assigned_to_plane[MAX_ODM_FACTOR][MAX_MPCC_FACTOR];
unsigned int pipes_assigned_to_plane[MAX_ODM_FACTOR][MAX_MPCC_FACTOR];
bool pipe_used[MAX_ODM_FACTOR][MAX_MPCC_FACTOR];
int num_pipes_assigned_to_plane_for_mpcc_combine;
int num_pipes_assigned_to_plane_for_odm_combine;
@ -340,8 +340,8 @@ static bool is_pipe_in_candidate_array(const unsigned int pipe_idx,
static bool find_more_pipes_for_stream(struct dml2_context *ctx,
struct dc_state *state, // The state we want to find a free mapping in
unsigned int stream_id, // The stream we want this pipe to drive
int *assigned_pipes,
int *assigned_pipe_count,
unsigned int *assigned_pipes,
unsigned int *assigned_pipe_count,
int pipes_needed,
const struct dc_state *existing_state) // The state (optional) that we want to minimize remapping relative to
{
@ -406,8 +406,8 @@ static bool find_more_pipes_for_stream(struct dml2_context *ctx,
static bool find_more_free_pipes(struct dml2_context *ctx,
struct dc_state *state, // The state we want to find a free mapping in
unsigned int stream_id, // The stream we want this pipe to drive
int *assigned_pipes,
int *assigned_pipe_count,
unsigned int *assigned_pipes,
unsigned int *assigned_pipe_count,
int pipes_needed,
const struct dc_state *existing_state) // The state (optional) that we want to minimize remapping relative to
{

4
drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c
View File

@ -330,8 +330,8 @@ void dml2_init_soc_states(struct dml2_context *dml2, const struct dc *in_dc,
{
struct dml2_policy_build_synthetic_soc_states_scratch *s = &dml2->v20.scratch.create_scratch.build_synthetic_socbb_scratch;
struct dml2_policy_build_synthetic_soc_states_params *p = &dml2->v20.scratch.build_synthetic_socbb_params;
unsigned int dcfclk_stas_mhz[NUM_DCFCLK_STAS] = {0};
unsigned int dcfclk_stas_mhz_new[NUM_DCFCLK_STAS_NEW] = {0};
int dcfclk_stas_mhz[NUM_DCFCLK_STAS] = {0};
int dcfclk_stas_mhz_new[NUM_DCFCLK_STAS_NEW] = {0};
unsigned int dml_project = dml2->v20.dml_core_ctx.project;
unsigned int i = 0;