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staging: comedi: ni_stc.h: tidy up IO_Bidirection_Pin_Register
Rename the CamelCase. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -353,7 +353,7 @@ static const struct mio_regmap m_series_stc_write_regmap[] = {
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[NISTC_AO_UC_LOADA_REG] = { 0x160, 4 },
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[NISTC_AO_UC_LOADB_REG] = { 0x164, 4 },
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[NISTC_CLK_FOUT_REG] = { 0x170, 2 },
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[IO_Bidirection_Pin_Register] = { 0x172, 2 },
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[NISTC_IO_BIDIR_PIN_REG] = { 0x172, 2 },
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[RTSI_Trig_Direction_Register] = { 0x174, 2 },
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[Interrupt_Control_Register] = { 0x176, 2 },
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[AI_Output_Control_Register] = { 0x178, 2 },
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@ -542,7 +542,7 @@ static inline void ni_set_bitfield(struct comedi_device *dev, int reg,
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devpriv->int_b_enable_reg |= bit_values & bit_mask;
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ni_stc_writew(dev, devpriv->int_b_enable_reg, reg);
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break;
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case IO_Bidirection_Pin_Register:
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case NISTC_IO_BIDIR_PIN_REG:
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devpriv->io_bidirection_pin_reg &= ~bit_mask;
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devpriv->io_bidirection_pin_reg |= bit_values & bit_mask;
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ni_stc_writew(dev, devpriv->io_bidirection_pin_reg, reg);
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@ -4434,10 +4434,10 @@ static int ni_pfi_insn_config(struct comedi_device *dev,
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switch (data[0]) {
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case COMEDI_OUTPUT:
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ni_set_bits(dev, IO_Bidirection_Pin_Register, 1 << chan, 1);
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ni_set_bits(dev, NISTC_IO_BIDIR_PIN_REG, 1 << chan, 1);
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break;
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case COMEDI_INPUT:
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ni_set_bits(dev, IO_Bidirection_Pin_Register, 1 << chan, 0);
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ni_set_bits(dev, NISTC_IO_BIDIR_PIN_REG, 1 << chan, 0);
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break;
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case INSN_CONFIG_DIO_QUERY:
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data[1] =
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@ -5303,7 +5303,7 @@ static int ni_E_init(struct comedi_device *dev,
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}
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s->insn_config = ni_pfi_insn_config;
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ni_set_bits(dev, IO_Bidirection_Pin_Register, ~0, 0);
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ni_set_bits(dev, NISTC_IO_BIDIR_PIN_REG, ~0, 0);
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/* cs5529 calibration adc */
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s = &dev->subdevices[NI_CS5529_CALIBRATION_SUBDEV];
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@ -276,6 +276,8 @@
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#define NISTC_CLK_FOUT_TO_DIVIDER(x) (((x) >> 0) & 0xf)
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#define NISTC_CLK_FOUT_DIVIDER_MASK NISTC_CLK_FOUT_DIVIDER(0xf)
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#define NISTC_IO_BIDIR_PIN_REG 57
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#define AI_Status_1_Register 2
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#define Interrupt_A_St 0x8000
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#define AI_FIFO_Full_St 0x4000
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@ -334,7 +336,6 @@ enum Joint_Status_2_Bits {
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#define AO_BC_Save_Registers 18
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#define AO_UC_Save_Registers 20
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#define IO_Bidirection_Pin_Register 57
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#define RTSI_Trig_Direction_Register 58
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enum RTSI_Trig_Direction_Bits {
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Drive_RTSI_Clock_Bit = 0x1,
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