github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-06-04 12:35:52 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

arm64: dts: ti: k3-am64-main: Add GPMC memory controller node

Browse Source 
The GPMC is a unified memory controller dedicated for interfacing
with external memory devices like
  - Asynchronous SRAM-like memories and ASICs
  - Asynchronous, synchronous, and page mode burst NOR flash
  - NAND flash
  - Pseudo-SRAM devices

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20220802104456.11069-2-rogerq@kernel.org
This commit is contained in:
Roger Quadros 2022-08-02 13:44:55 +03:00 committed by Vignesh Raghavendra
parent f42f6f9e77
commit 5ec0690431
3 changed files with 27 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
arch/arm64/boot/dts/ti/k3-am64-main.dtsi
View File

@ -1328,4 +1328,23 @@ rng: rng@40910000 {
status = "disabled"; /* Used by OP-TEE */
};
};
gpmc0: memory-controller@3b000000 {
compatible = "ti,am64-gpmc";
power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 80 0>;
clock-names = "fck";
reg = <0x00 0x03b000000 0x00 0x400>,
<0x00 0x050000000 0x00 0x8000000>;
reg-names = "cfg", "data";
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
gpmc,num-cs = <3>;
gpmc,num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
};
};

4
arch/arm64/boot/dts/ti/k3-am642-evm.dts
View File

@ -676,3 +676,7 @@ &main_mcan1 {
pinctrl-0 = <&main_mcan1_pins_default>;
phys = <&transceiver2>;
};
&gpmc0 {
status = "disabled";
};

4
arch/arm64/boot/dts/ti/k3-am642-sk.dts
View File

@ -607,3 +607,7 @@ &main_mcan0 {
&main_mcan1 {
status = "disabled";
};
&gpmc0 {
status = "disabled";
};