From 5eb7acedd4a5de351daee401a9fa2c09d2566afd Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Thu, 14 Dec 2017 18:05:53 +0800 Subject: [PATCH] arm64: dts: rockchip: Add rk3368 Sziauto board support Change-Id: I1d4188dcb268d25d445c8369a44813eeceaace2f Signed-off-by: Wyon Bi --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../dts/rockchip/rk3368-sziauto-rk618.dts | 685 ++++++++++++++++++ 2 files changed, 686 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-sziauto-rk618.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index f9034bf19a7a..b32378492827 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88-dcdc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-sheep.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-sheep-lvds.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-sziauto-rk618.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-xikp.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-box-808-android-6.0.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-box-rev1-android-6.0.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3368-sziauto-rk618.dts b/arch/arm64/boot/dts/rockchip/rk3368-sziauto-rk618.dts new file mode 100644 index 000000000000..78c1c421cec8 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3368-sziauto-rk618.dts @@ -0,0 +1,685 @@ +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "rk3368.dtsi" +#include "rk3368-android.dtsi" +#include +#include + +/ { + model = "Rockchip rk3368 Sziauto board"; + compatible = "rockchip,sziauto", "rockchip,rk3368"; + + panel { + compatible = "simple-panel"; + backlight = <&backlight>; + enable-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>; + prepare-delay-ms = <20>; + enable-delay-ms = <20>; + disable-delay-ms = <20>; + unprepare-delay-ms = <20>; + bus-format = ; + + display-timings { + native-mode = <&timing0>; + + timing0: timing0 { + clock-frequency = <136000000>; + hactive = <1920>; + vactive = <1080>; + hback-porch = <60>; + hfront-porch = <60>; + hsync-len = <40>; + vback-porch = <4>; + vfront-porch = <4>; + vsync-len = <3>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + port { + panel_input_lvds: endpoint { + remote-endpoint = <&lvds_output_panel>; + }; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk818 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm0 0 50000 0>; + brightness-levels = < + 32 32 34 34 36 36 38 38 40 40 + 42 42 44 44 46 46 48 48 50 50 + 52 52 54 54 56 56 58 58 60 60 + 62 62 64 64 66 66 68 68 70 70 + 72 72 74 74 76 76 78 78 80 80 + 82 82 84 84 86 86 88 88 90 90 + 92 92 94 94 96 96 98 98 100 100 + 102 102 104 104 106 106 108 108 110 110 + 112 112 114 114 116 116 118 118 120 120 + 122 122 124 124 126 126 128 128 130 130 + 132 132 134 134 136 136 138 138 140 140 + 142 142 144 144 146 146 148 148 150 150 + 152 152 154 154 156 156 158 158 160 160 + 162 162 164 164 166 166 168 168 170 170 + 172 172 174 174 176 176 178 178 180 180 + 182 182 184 184 186 186 188 188 190 190 + 192 192 194 194 196 196 198 198 200 200 + 202 202 204 204 206 206 208 208 210 210 + 212 212 214 214 216 216 218 218 220 220 + 222 222 224 224 225 225 226 226 227 227 + 228 228 229 229 230 230 231 231 232 232 + 233 233 234 234 235 235 236 236 237 237 + 238 238 239 239 240 240 241 241 242 242 + 243 243 244 244 245 245 246 246 247 247 + 248 248 249 249 250 250 251 251 252 252 + 253 253 254 254 255 255>; + default-brightness-level = <120>; + enable-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; + }; + + rockchip-key { + compatible = "rockchip,key"; + io-channels = <&saradc 1>; + status = "okay"; + + vol-up-key { + linux,code = <115>; + label = "volume up"; + rockchip,adc_value = <1>; + }; + + vol-down-key { + linux,code = <114>; + label = "volume down"; + rockchip,adc_value = <170>; + }; + + power-key { + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; + linux,code = <116>; + label = "power"; + gpio-key,wakeup; + }; + + menu-key { + linux,code = <59>; + label = "menu"; + rockchip,adc_value = <355>; + }; + + home-key { + linux,code = <102>; + label = "home"; + rockchip,adc_value = <746>; + }; + + back-key { + linux,code = <158>; + label = "back"; + rockchip,adc_value = <560>; + }; + + camera-key { + linux,code = <212>; + label = "camera"; + rockchip,adc_value = <450>; + }; + }; + + vcc_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + }; + + vcc_host: vcc-host { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&host_vbus_drv>; + regulator-name = "vcc_host"; + regulator-always-on; + }; +}; + +&i2c5 { + status = "okay"; + + rk618: rk618@50 { + compatible = "rockchip,rk618"; + reg = <0x50>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2s_8ch_mclk &lcdc_lcdc &state_video_phy_ttl>; + pinctrl-1 = <&lcdc_gpio &state_video_phy_idle>; + clocks = <&cru SCLK_I2S_8CH_OUT>; + clock-names = "clkin"; + reset-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>; + status = "okay"; + + CRU: cru { + compatible = "rockchip,rk618-cru"; + clocks = <&cru SCLK_I2S_8CH_OUT>, <&cru DCLK_VOP>; + clock-names = "clkin", "lcdc0_dclkp"; + assigned-clocks = <&CRU SCALER_PLLIN_CLK>, <&CRU VIF_PLLIN_CLK>, + <&CRU HDMI_CLK>, <&CRU SCALER_CLK>, + <&CRU CODEC_CLK>; + assigned-clock-parents = <&CRU LCDC0_CLK>, <&CRU LCDC0_CLK>, + <&CRU VIF0_CLK>, <&CRU SCALER_PLL_CLK>, + <&cru SCLK_I2S_8CH_OUT>; + #clock-cells = <1>; + status = "okay"; + }; + + LVDS: lvds { + compatible = "rockchip,rk618-lvds"; + clocks = <&CRU LVDS_CLK>, <&CRU DITHER_CLK>, + <&CRU VIF0_CLK>, <&CRU SCALER_CLK>; + clock-names = "lvds", "dither", "vif", "scaler"; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lvds_input_vop: endpoint { + remote-endpoint = <&vop_output_lvds>; + }; + }; + + port@1 { + reg = <1>; + + lvds_output_panel: endpoint { + remote-endpoint = <&panel_input_lvds>; + }; + }; + }; + }; + }; +}; + +&mipi_dphy { + status = "okay"; +}; + +&vop_out { + vop_output_lvds: endpoint@4 { + reg = <4>; + remote-endpoint = <&lvds_input_vop>; + }; +}; + +&route_lvds { + connect = <&vop_output_lvds>; + status = "disabled"; +}; + +&emmc { + status = "okay"; + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + supports-emmc; + disable-wp; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; +}; + +&sdmmc { + status = "disabled"; + clock-frequency = <37500000>; + clock-freq-min-max = <400000 37500000>; + supports-sd; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; +}; + +&sdio0 { + clock-frequency = <50000000>; + clock-freq-min-max = <200000 50000000>; + supports-sdio; + bus-width = <4>; + disable-wp; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; + sd-uhs-sdr104; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + syr827: syr827@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + + regulator-compatible = "fan53555-reg"; + regulator-name = "vdd_arm"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + regulator-initial-state = <3>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + rk818: pmic@1c { + compatible = "rockchip,rk818"; + reg = <0x1c>; + clock-output-names = "xin32k", "wifibt_32kin"; + interrupt-parent = <&gpio0>; + interrupts = <1 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_sys>; + vcc9-supply = <&vcc_io>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1450000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1250000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_io"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_codec: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcca_codec"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_tp: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc_tp"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_10: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd_10"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc18_lcd: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_lcd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vccio_pmu: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vccio_pmu"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd10_lcd: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd10_lcd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_18: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_18"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vccio_wl: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_wl"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vccio_sd: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_sd: SWITCH_REG { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_sd"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + boost_otg: DCDC_BOOST { + regulator-name = "boost_otg"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <5000000>; + }; + }; + }; + }; +}; + +&cpu_l0 { + cpu-supply = <&syr827>; +}; + +&cpu_l1 { + cpu-supply = <&syr827>; +}; + +&cpu_l2 { + cpu-supply = <&syr827>; +}; + +&cpu_l3 { + cpu-supply = <&syr827>; +}; + +&cpu_b0 { + cpu-supply = <&syr827>; +}; + +&cpu_b1 { + cpu-supply = <&syr827>; +}; + +&cpu_b2 { + cpu-supply = <&syr827>; +}; + +&cpu_b3 { + cpu-supply = <&syr827>; +}; + +&gpu { + logic-supply = <&vdd_logic>; +}; + +&io_domains { + dvp-supply = <&vcc_18>; + audio-supply = <&vcc_io>; + gpio30-supply = <&vcc_io>; + gpio1830-supply = <&vcc_io>; + sdcard-supply = <&vccio_sd>; + wifi-supply = <&vccio_wl>; + status = "okay"; +}; + +&pmu_io_domains { + pmu-supply = <&vcc_io>; + vop-supply = <&vcc_io>; + status = "okay"; +}; + +&pwm0 { + status = "okay"; +}; + +&pwm1 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts>; + status = "okay"; +}; + +&u2phy { + status = "okay"; + + u2phy_host: host-port { + phy-supply = <&vcc_host>; + status = "okay"; + }; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&mailbox { + status = "okay"; +}; + +&mailbox_scpi { + status = "okay"; +}; + +&saradc { + status = "okay"; +}; + +&tsadc { + tsadc-supply = <&syr827>; + status = "okay"; +}; + +&pinctrl { + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = ; + }; + }; + + usb2 { + host_vbus_drv: host-vbus-drv { + rockchip,pins = ; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <3 4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +};