From 5e15d0342d3cfb15d5527d8eefa58c2f72d5d541 Mon Sep 17 00:00:00 2001 From: sun wenhan Date: Mon, 5 Oct 2026 19:02:54 -0600 Subject: [PATCH] riscv: align pcie bus assign logic with ARM64 RISC-V currently relies on the asm-generic default of pcibios_assign_all_busses() returning 1, so the kernel always re-assigns all PCI bus numbers and ignores the bus numbers already set up by the firmware. This has two downsides. As UEFI 2.8 has brought mature firmware support to RISC-V servers, the OS can trust and inherit the PCI bus enumeration done by the BIOS, skipping a redundant re-enumeration at boot and improving the boot time. The unconditional re-assignment also causes bus numbering conflicts during PCI rescan. When a root port that is not the last one in the hierarchy is removed and the bus is rescanned, the kernel fails with: pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under [bus 00-ff] (conflicts with (null) [bus 02]) Define pcibios_assign_all_busses() the same way as ARM64, so that RISC-V also preserves the bus numbers assigned by the firmware by default instead of always re-assigning them. This keeps RISC-V consistent with the other major architectures. Signed-off-by: sun wenhan Link: https://patch.msgid.link/20260929173053186td0a5D4tn7cNBN-R8JyEp@zte.com.cn [pjw@kernel.org: fixed submitter name to align with the S-o-b] Signed-off-by: Paul Walmsley --- arch/riscv/include/asm/pci.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/riscv/include/asm/pci.h b/arch/riscv/include/asm/pci.h index cc2a184cfc2e..b2f91abebd61 100644 --- a/arch/riscv/include/asm/pci.h +++ b/arch/riscv/include/asm/pci.h @@ -15,6 +15,11 @@ #define PCIBIOS_MIN_IO 4 #define PCIBIOS_MIN_MEM 16 +/* + * Set to 1 if the kernel should re-assign all PCI bus numbers + */ +#define pcibios_assign_all_busses() (pci_has_flag(PCI_REASSIGN_ALL_BUS)) + #if defined(CONFIG_PCI) && defined(CONFIG_NUMA) static inline int pcibus_to_node(struct pci_bus *bus) {