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gpio: zevio: allow COMPILE_TEST builds
The ZEVIO GPIO driver uses generic platform, MMIO, and gpiolib interfaces. Allow it to build with COMPILE_TEST so it gets coverage on non-ARM platforms. Drop the ARM-specific IOMEM() casts around the register pointer. The pointer is already __iomem, so readl() and writel() can use it directly. Tested with: make LLVM=1 ARCH=loongarch drivers/gpio/gpio-zevio.o Assisted-by: Codex:GPT-5.5 Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://patch.msgid.link/20260509003438.956051-1-rosenp@gmail.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
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@ -869,7 +869,7 @@ config GPIO_XTENSA
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config GPIO_ZEVIO
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bool "LSI ZEVIO SoC memory mapped GPIOs"
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depends on ARM
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depends on ARM || COMPILE_TEST
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help
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Say yes here to support the GPIO controller in LSI ZEVIO SoCs.
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@ -64,14 +64,14 @@ static inline u32 zevio_gpio_port_get(struct zevio_gpio *c, unsigned pin,
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unsigned port_offset)
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{
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unsigned section_offset = ((pin >> 3) & 3)*ZEVIO_GPIO_SECTION_SIZE;
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return readl(IOMEM(c->regs + section_offset + port_offset));
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return readl(c->regs + section_offset + port_offset);
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}
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static inline void zevio_gpio_port_set(struct zevio_gpio *c, unsigned pin,
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unsigned port_offset, u32 val)
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{
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unsigned section_offset = ((pin >> 3) & 3)*ZEVIO_GPIO_SECTION_SIZE;
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writel(val, IOMEM(c->regs + section_offset + port_offset));
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writel(val, c->regs + section_offset + port_offset);
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}
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/* Functions for struct gpio_chip */
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