wifi: ath12k: Move srng processing to wifi7 directory

Move ath12k_dp_service_srng API and ath12k_dp_rx_process_reo_status
to wifi7 directory.

As srng processing is specific to architecture (wifi7 / wifi8), the
API ath12k_dp_service_srng is being moved to wifi7 directory. The
file wifi7/dp.c can be used to define wifi7-specifi functions that are
common to both tx and rx.

The API which is invoked as part of service srng,
ath12k_dp_rx_process_reo_status is also moved to wifi7 directory, as
the implementation is specific to HW due to the usage of wifi7
specific HAL macros.

Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.4.1-00199-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3

Signed-off-by: Pavankumar Nandeshwar <quic_pnandesh@quicinc.com>
Signed-off-by: Ripan Deuri <quic_rdeuri@quicinc.com>
Reviewed-by: Vasanthakumar Thiagarajan <vasanthakumar.thiagarajan@oss.qualcomm.com>
Reviewed-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com>
Link: https://patch.msgid.link/20250828173553.3341351-12-quic_rdeuri@quicinc.com
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
This commit is contained in:
Pavankumar Nandeshwar 2025-08-28 23:05:44 +05:30 committed by Jeff Johnson
parent a7cfbb18d4
commit 5d2df2aa84
11 changed files with 237 additions and 210 deletions

View File

@ -24,7 +24,8 @@ ath12k-$(CONFIG_ATH12K_AHB) += ahb.o
ath12k-y += wifi7/hal_tx.o \
wifi7/hal_rx.o \
wifi7/dp_rx.o
wifi7/dp_rx.o \
wifi7/dp.o
obj-$(CONFIG_ATH12K) += wifi7/

View File

@ -1,7 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
* Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
#include <linux/dma-mapping.h>
@ -15,6 +15,7 @@
#include "ahb.h"
#include "debug.h"
#include "hif.h"
#include "wifi7/dp.h"
#define ATH12K_IRQ_CE0_OFFSET 4
#define ATH12K_MAX_UPDS 1

View File

@ -883,130 +883,6 @@ int ath12k_dp_link_desc_setup(struct ath12k_base *ab,
return ret;
}
int ath12k_dp_service_srng(struct ath12k_base *ab,
struct ath12k_ext_irq_grp *irq_grp,
int budget)
{
struct napi_struct *napi = &irq_grp->napi;
int grp_id = irq_grp->grp_id;
int work_done = 0;
int i = 0, j;
int tot_work_done = 0;
enum dp_monitor_mode monitor_mode;
u8 ring_mask;
if (ab->hw_params->ring_mask->tx[grp_id]) {
i = fls(ab->hw_params->ring_mask->tx[grp_id]) - 1;
ath12k_dp_tx_completion_handler(ab, i);
}
if (ab->hw_params->ring_mask->rx_err[grp_id]) {
work_done = ath12k_dp_rx_process_err(ab, napi, budget);
budget -= work_done;
tot_work_done += work_done;
if (budget <= 0)
goto done;
}
if (ab->hw_params->ring_mask->rx_wbm_rel[grp_id]) {
work_done = ath12k_dp_rx_process_wbm_err(ab,
napi,
budget);
budget -= work_done;
tot_work_done += work_done;
if (budget <= 0)
goto done;
}
if (ab->hw_params->ring_mask->rx[grp_id]) {
i = fls(ab->hw_params->ring_mask->rx[grp_id]) - 1;
work_done = ath12k_dp_rx_process(ab, i, napi,
budget);
budget -= work_done;
tot_work_done += work_done;
if (budget <= 0)
goto done;
}
if (ab->hw_params->ring_mask->rx_mon_status[grp_id]) {
ring_mask = ab->hw_params->ring_mask->rx_mon_status[grp_id];
for (i = 0; i < ab->num_radios; i++) {
for (j = 0; j < ab->hw_params->num_rxdma_per_pdev; j++) {
int id = i * ab->hw_params->num_rxdma_per_pdev + j;
if (ring_mask & BIT(id)) {
work_done =
ath12k_dp_mon_process_ring(ab, id, napi, budget,
0);
budget -= work_done;
tot_work_done += work_done;
if (budget <= 0)
goto done;
}
}
}
}
if (ab->hw_params->ring_mask->rx_mon_dest[grp_id]) {
monitor_mode = ATH12K_DP_RX_MONITOR_MODE;
ring_mask = ab->hw_params->ring_mask->rx_mon_dest[grp_id];
for (i = 0; i < ab->num_radios; i++) {
for (j = 0; j < ab->hw_params->num_rxdma_per_pdev; j++) {
int id = i * ab->hw_params->num_rxdma_per_pdev + j;
if (ring_mask & BIT(id)) {
work_done =
ath12k_dp_mon_process_ring(ab, id, napi, budget,
monitor_mode);
budget -= work_done;
tot_work_done += work_done;
if (budget <= 0)
goto done;
}
}
}
}
if (ab->hw_params->ring_mask->tx_mon_dest[grp_id]) {
monitor_mode = ATH12K_DP_TX_MONITOR_MODE;
ring_mask = ab->hw_params->ring_mask->tx_mon_dest[grp_id];
for (i = 0; i < ab->num_radios; i++) {
for (j = 0; j < ab->hw_params->num_rxdma_per_pdev; j++) {
int id = i * ab->hw_params->num_rxdma_per_pdev + j;
if (ring_mask & BIT(id)) {
work_done =
ath12k_dp_mon_process_ring(ab, id, napi, budget,
monitor_mode);
budget -= work_done;
tot_work_done += work_done;
if (budget <= 0)
goto done;
}
}
}
}
if (ab->hw_params->ring_mask->reo_status[grp_id])
ath12k_dp_rx_process_reo_status(ab);
if (ab->hw_params->ring_mask->host2rxdma[grp_id]) {
struct ath12k_dp *dp = &ab->dp;
struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring;
LIST_HEAD(list);
ath12k_dp_rx_bufs_replenish(ab, rx_ring, &list, 0);
}
/* TODO: Implement handler for other interrupts */
done:
return tot_work_done;
}
void ath12k_dp_pdev_free(struct ath12k_base *ab)
{
int i;

View File

@ -1936,9 +1936,6 @@ static inline void ath12k_dp_get_mac_addr(u32 addr_l32, u16 addr_h16, u8 *addr)
memcpy(addr + 4, &addr_h16, ETH_ALEN - 4);
}
int ath12k_dp_service_srng(struct ath12k_base *ab,
struct ath12k_ext_irq_grp *irq_grp,
int budget);
int ath12k_dp_htt_connect(struct ath12k_dp *dp);
void ath12k_dp_vdev_tx_attach(struct ath12k *ar, struct ath12k_link_vif *arvif);
void ath12k_dp_free(struct ath12k_base *ab);

View File

@ -2444,85 +2444,6 @@ u64 ath12k_dp_rx_h_get_pn(struct ath12k *ar, struct sk_buff *skb)
return pn;
}
void ath12k_dp_rx_process_reo_status(struct ath12k_base *ab)
{
struct ath12k_dp *dp = &ab->dp;
struct hal_tlv_64_hdr *hdr;
struct hal_srng *srng;
struct ath12k_dp_rx_reo_cmd *cmd, *tmp;
bool found = false;
u16 tag;
struct hal_reo_status reo_status;
srng = &ab->hal.srng_list[dp->reo_status_ring.ring_id];
memset(&reo_status, 0, sizeof(reo_status));
spin_lock_bh(&srng->lock);
ath12k_hal_srng_access_begin(ab, srng);
while ((hdr = ath12k_hal_srng_dst_get_next_entry(ab, srng))) {
tag = le64_get_bits(hdr->tl, HAL_SRNG_TLV_HDR_TAG);
switch (tag) {
case HAL_REO_GET_QUEUE_STATS_STATUS:
ath12k_hal_reo_status_queue_stats(ab, hdr,
&reo_status);
break;
case HAL_REO_FLUSH_QUEUE_STATUS:
ath12k_hal_reo_flush_queue_status(ab, hdr,
&reo_status);
break;
case HAL_REO_FLUSH_CACHE_STATUS:
ath12k_hal_reo_flush_cache_status(ab, hdr,
&reo_status);
break;
case HAL_REO_UNBLOCK_CACHE_STATUS:
ath12k_hal_reo_unblk_cache_status(ab, hdr,
&reo_status);
break;
case HAL_REO_FLUSH_TIMEOUT_LIST_STATUS:
ath12k_hal_reo_flush_timeout_list_status(ab, hdr,
&reo_status);
break;
case HAL_REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS:
ath12k_hal_reo_desc_thresh_reached_status(ab, hdr,
&reo_status);
break;
case HAL_REO_UPDATE_RX_REO_QUEUE_STATUS:
ath12k_hal_reo_update_rx_reo_queue_status(ab, hdr,
&reo_status);
break;
default:
ath12k_warn(ab, "Unknown reo status type %d\n", tag);
continue;
}
spin_lock_bh(&dp->reo_cmd_lock);
list_for_each_entry_safe(cmd, tmp, &dp->reo_cmd_list, list) {
if (reo_status.uniform_hdr.cmd_num == cmd->cmd_num) {
found = true;
list_del(&cmd->list);
break;
}
}
spin_unlock_bh(&dp->reo_cmd_lock);
if (found) {
cmd->handler(dp, (void *)&cmd->data,
reo_status.uniform_hdr.cmd_status);
kfree(cmd);
}
found = false;
}
ath12k_hal_srng_access_end(ab, srng);
spin_unlock_bh(&srng->lock);
}
void ath12k_dp_rx_free(struct ath12k_base *ab)
{
struct ath12k_dp *dp = &ab->dp;

View File

@ -394,7 +394,6 @@ void ath12k_dp_rx_free(struct ath12k_base *ab);
int ath12k_dp_rx_pdev_alloc(struct ath12k_base *ab, int pdev_idx);
void ath12k_dp_rx_pdev_free(struct ath12k_base *ab, int pdev_idx);
void ath12k_dp_rx_reo_cmd_list_cleanup(struct ath12k_base *ab);
void ath12k_dp_rx_process_reo_status(struct ath12k_base *ab);
int ath12k_dp_rx_bufs_replenish(struct ath12k_base *ab,
struct dp_rxdma_ring *rx_ring,
struct list_head *used_list,

View File

@ -1,7 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
#include <linux/module.h>
@ -15,6 +15,7 @@
#include "hif.h"
#include "mhi.h"
#include "debug.h"
#include "wifi7/dp.h"
#define ATH12K_PCI_BAR_NUM 0
#define ATH12K_PCI_DMA_MASK 36

View File

@ -0,0 +1,136 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
#include "../core.h"
#include "../debug.h"
#include "../dp_rx.h"
#include "../dp_tx.h"
#include "../dp_mon.h"
#include "dp_rx.h"
#include "dp.h"
int ath12k_dp_service_srng(struct ath12k_base *ab,
struct ath12k_ext_irq_grp *irq_grp,
int budget)
{
struct napi_struct *napi = &irq_grp->napi;
int grp_id = irq_grp->grp_id;
int work_done = 0;
int i = 0, j;
int tot_work_done = 0;
enum dp_monitor_mode monitor_mode;
u8 ring_mask;
if (ab->hw_params->ring_mask->tx[grp_id]) {
i = fls(ab->hw_params->ring_mask->tx[grp_id]) - 1;
ath12k_dp_tx_completion_handler(ab, i);
}
if (ab->hw_params->ring_mask->rx_err[grp_id]) {
work_done = ath12k_dp_rx_process_err(ab, napi, budget);
budget -= work_done;
tot_work_done += work_done;
if (budget <= 0)
goto done;
}
if (ab->hw_params->ring_mask->rx_wbm_rel[grp_id]) {
work_done = ath12k_dp_rx_process_wbm_err(ab,
napi,
budget);
budget -= work_done;
tot_work_done += work_done;
if (budget <= 0)
goto done;
}
if (ab->hw_params->ring_mask->rx[grp_id]) {
i = fls(ab->hw_params->ring_mask->rx[grp_id]) - 1;
work_done = ath12k_dp_rx_process(ab, i, napi,
budget);
budget -= work_done;
tot_work_done += work_done;
if (budget <= 0)
goto done;
}
if (ab->hw_params->ring_mask->rx_mon_status[grp_id]) {
ring_mask = ab->hw_params->ring_mask->rx_mon_status[grp_id];
for (i = 0; i < ab->num_radios; i++) {
for (j = 0; j < ab->hw_params->num_rxdma_per_pdev; j++) {
int id = i * ab->hw_params->num_rxdma_per_pdev + j;
if (ring_mask & BIT(id)) {
work_done =
ath12k_dp_mon_process_ring(ab, id, napi, budget,
0);
budget -= work_done;
tot_work_done += work_done;
if (budget <= 0)
goto done;
}
}
}
}
if (ab->hw_params->ring_mask->rx_mon_dest[grp_id]) {
monitor_mode = ATH12K_DP_RX_MONITOR_MODE;
ring_mask = ab->hw_params->ring_mask->rx_mon_dest[grp_id];
for (i = 0; i < ab->num_radios; i++) {
for (j = 0; j < ab->hw_params->num_rxdma_per_pdev; j++) {
int id = i * ab->hw_params->num_rxdma_per_pdev + j;
if (ring_mask & BIT(id)) {
work_done =
ath12k_dp_mon_process_ring(ab, id, napi, budget,
monitor_mode);
budget -= work_done;
tot_work_done += work_done;
if (budget <= 0)
goto done;
}
}
}
}
if (ab->hw_params->ring_mask->tx_mon_dest[grp_id]) {
monitor_mode = ATH12K_DP_TX_MONITOR_MODE;
ring_mask = ab->hw_params->ring_mask->tx_mon_dest[grp_id];
for (i = 0; i < ab->num_radios; i++) {
for (j = 0; j < ab->hw_params->num_rxdma_per_pdev; j++) {
int id = i * ab->hw_params->num_rxdma_per_pdev + j;
if (ring_mask & BIT(id)) {
work_done =
ath12k_dp_mon_process_ring(ab, id, napi, budget,
monitor_mode);
budget -= work_done;
tot_work_done += work_done;
if (budget <= 0)
goto done;
}
}
}
}
if (ab->hw_params->ring_mask->reo_status[grp_id])
ath12k_dp_rx_process_reo_status(ab);
if (ab->hw_params->ring_mask->host2rxdma[grp_id]) {
struct ath12k_dp *dp = &ab->dp;
struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring;
LIST_HEAD(list);
ath12k_dp_rx_bufs_replenish(ab, rx_ring, &list, 0);
}
/* TODO: Implement handler for other interrupts */
done:
return tot_work_done;
}

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@ -0,0 +1,15 @@
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
#ifndef ATH12K_DP_WIFI7_H
#define ATH12K_DP_WIFI7_H
#include "hw.h"
int ath12k_dp_service_srng(struct ath12k_base *ab,
struct ath12k_ext_irq_grp *irq_grp,
int budget);
#endif

View File

@ -1642,3 +1642,82 @@ int ath12k_dp_rxdma_ring_sel_config_wcn7850(struct ath12k_base *ab)
return ret;
}
EXPORT_SYMBOL(ath12k_dp_rxdma_ring_sel_config_wcn7850);
void ath12k_dp_rx_process_reo_status(struct ath12k_base *ab)
{
struct ath12k_dp *dp = &ab->dp;
struct hal_tlv_64_hdr *hdr;
struct hal_srng *srng;
struct ath12k_dp_rx_reo_cmd *cmd, *tmp;
bool found = false;
u16 tag;
struct hal_reo_status reo_status;
srng = &ab->hal.srng_list[dp->reo_status_ring.ring_id];
memset(&reo_status, 0, sizeof(reo_status));
spin_lock_bh(&srng->lock);
ath12k_hal_srng_access_begin(ab, srng);
while ((hdr = ath12k_hal_srng_dst_get_next_entry(ab, srng))) {
tag = le64_get_bits(hdr->tl, HAL_SRNG_TLV_HDR_TAG);
switch (tag) {
case HAL_REO_GET_QUEUE_STATS_STATUS:
ath12k_hal_reo_status_queue_stats(ab, hdr,
&reo_status);
break;
case HAL_REO_FLUSH_QUEUE_STATUS:
ath12k_hal_reo_flush_queue_status(ab, hdr,
&reo_status);
break;
case HAL_REO_FLUSH_CACHE_STATUS:
ath12k_hal_reo_flush_cache_status(ab, hdr,
&reo_status);
break;
case HAL_REO_UNBLOCK_CACHE_STATUS:
ath12k_hal_reo_unblk_cache_status(ab, hdr,
&reo_status);
break;
case HAL_REO_FLUSH_TIMEOUT_LIST_STATUS:
ath12k_hal_reo_flush_timeout_list_status(ab, hdr,
&reo_status);
break;
case HAL_REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS:
ath12k_hal_reo_desc_thresh_reached_status(ab, hdr,
&reo_status);
break;
case HAL_REO_UPDATE_RX_REO_QUEUE_STATUS:
ath12k_hal_reo_update_rx_reo_queue_status(ab, hdr,
&reo_status);
break;
default:
ath12k_warn(ab, "Unknown reo status type %d\n", tag);
continue;
}
spin_lock_bh(&dp->reo_cmd_lock);
list_for_each_entry_safe(cmd, tmp, &dp->reo_cmd_list, list) {
if (reo_status.uniform_hdr.cmd_num == cmd->cmd_num) {
found = true;
list_del(&cmd->list);
break;
}
}
spin_unlock_bh(&dp->reo_cmd_lock);
if (found) {
cmd->handler(dp, (void *)&cmd->data,
reo_status.uniform_hdr.cmd_status);
kfree(cmd);
}
found = false;
}
ath12k_hal_srng_access_end(ab, srng);
spin_unlock_bh(&srng->lock);
}

View File

@ -16,6 +16,7 @@ int ath12k_dp_rx_process_err(struct ath12k_base *ab, struct napi_struct *napi,
int ath12k_dp_rx_process(struct ath12k_base *ab, int mac_id,
struct napi_struct *napi,
int budget);
void ath12k_dp_rx_process_reo_status(struct ath12k_base *ab);
int ath12k_dp_rxdma_ring_sel_config_qcn9274(struct ath12k_base *ab);
int ath12k_dp_rxdma_ring_sel_config_wcn7850(struct ath12k_base *ab);
#endif