wifi: rtw89: 8852a: move DIG tables to rtw8852a.c

Now, most of PHY parameter tables in driver can be loaded via FW elements.
Plan to generate the corresponding FW elements for 8852A PHY tables. Then,
after FW elements work for a enough time, rtw8852a_table.c can be cleaned
up. However, DIG (dynamic initial gain) tables are legacy for 8852A only,
so FW element doesn't support. Their sizes are not very big, so move them
to rtw8852a.c and keep rtw8852a_table.c for PHY tables which are supported
by FW elements.

No logic is changed.

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260213061552.29997-6-pkshih@realtek.com
This commit is contained in:
Zong-Zhe Yang 2026-02-13 14:15:45 +08:00 committed by Ping-Ke Shih
parent 1d67f1f8e9
commit 5cfda90c63
3 changed files with 51 additions and 52 deletions

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@ -2179,6 +2179,57 @@ static void rtw8852a_query_ppdu(struct rtw89_dev *rtwdev,
rtw8852a_fill_freq_with_ppdu(rtwdev, phy_ppdu, status);
}
#define DECLARE_DIG_TABLE(name) \
static const struct rtw89_phy_dig_gain_cfg name##_table = { \
.table = name, \
.size = ARRAY_SIZE(name) \
}
static const struct rtw89_reg_def rtw89_8852a_lna_gain_g[] = {
{R_PATH0_LNA_ERR1, B_PATH0_LNA_ERR_G0_G_MSK},
{R_PATH0_LNA_ERR2, B_PATH0_LNA_ERR_G1_G_MSK},
{R_PATH0_LNA_ERR2, B_PATH0_LNA_ERR_G2_G_MSK},
{R_PATH0_LNA_ERR3, B_PATH0_LNA_ERR_G3_G_MSK},
{R_PATH0_LNA_ERR3, B_PATH0_LNA_ERR_G4_G_MSK},
{R_PATH0_LNA_ERR4, B_PATH0_LNA_ERR_G5_G_MSK},
{R_PATH0_LNA_ERR5, B_PATH0_LNA_ERR_G6_G_MSK},
};
DECLARE_DIG_TABLE(rtw89_8852a_lna_gain_g);
static const struct rtw89_reg_def rtw89_8852a_tia_gain_g[] = {
{R_PATH0_TIA_ERR_G0, B_PATH0_TIA_ERR_G0_G_MSK},
{R_PATH0_TIA_ERR_G1, B_PATH0_TIA_ERR_G1_G_MSK},
};
DECLARE_DIG_TABLE(rtw89_8852a_tia_gain_g);
static const struct rtw89_reg_def rtw89_8852a_lna_gain_a[] = {
{R_PATH0_LNA_ERR1, B_PATH0_LNA_ERR_G0_A_MSK},
{R_PATH0_LNA_ERR1, B_PATH0_LNA_ERR_G1_A_MSK},
{R_PATH0_LNA_ERR2, B_PATH0_LNA_ERR_G2_A_MSK},
{R_PATH0_LNA_ERR3, B_PATH0_LNA_ERR_G3_A_MSK},
{R_PATH0_LNA_ERR3, B_PATH0_LNA_ERR_G4_A_MSK},
{R_PATH0_LNA_ERR4, B_PATH0_LNA_ERR_G5_A_MSK},
{R_PATH0_LNA_ERR4, B_PATH0_LNA_ERR_G6_A_MSK},
};
DECLARE_DIG_TABLE(rtw89_8852a_lna_gain_a);
static const struct rtw89_reg_def rtw89_8852a_tia_gain_a[] = {
{R_PATH0_TIA_ERR_G0, B_PATH0_TIA_ERR_G0_A_MSK},
{R_PATH0_TIA_ERR_G1, B_PATH0_TIA_ERR_G1_A_MSK},
};
DECLARE_DIG_TABLE(rtw89_8852a_tia_gain_a);
static const struct rtw89_phy_dig_gain_table rtw89_8852a_phy_dig_table = {
.cfg_lna_g = &rtw89_8852a_lna_gain_g_table,
.cfg_tia_g = &rtw89_8852a_tia_gain_g_table,
.cfg_lna_a = &rtw89_8852a_lna_gain_a_table,
.cfg_tia_a = &rtw89_8852a_tia_gain_a_table
};
#ifdef CONFIG_PM
static const struct wiphy_wowlan_support rtw_wowlan_stub_8852a = {
.flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT,

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@ -50952,50 +50952,6 @@ const s8 rtw89_8852a_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM]
[2][1][RTW89_UK][46] = 32,
};
#define DECLARE_DIG_TABLE(name) \
static const struct rtw89_phy_dig_gain_cfg name##_table = { \
.table = name, \
.size = ARRAY_SIZE(name) \
}
static const struct rtw89_reg_def rtw89_8852a_lna_gain_g[] = {
{R_PATH0_LNA_ERR1, B_PATH0_LNA_ERR_G0_G_MSK},
{R_PATH0_LNA_ERR2, B_PATH0_LNA_ERR_G1_G_MSK},
{R_PATH0_LNA_ERR2, B_PATH0_LNA_ERR_G2_G_MSK},
{R_PATH0_LNA_ERR3, B_PATH0_LNA_ERR_G3_G_MSK},
{R_PATH0_LNA_ERR3, B_PATH0_LNA_ERR_G4_G_MSK},
{R_PATH0_LNA_ERR4, B_PATH0_LNA_ERR_G5_G_MSK},
{R_PATH0_LNA_ERR5, B_PATH0_LNA_ERR_G6_G_MSK},
};
DECLARE_DIG_TABLE(rtw89_8852a_lna_gain_g);
static const struct rtw89_reg_def rtw89_8852a_tia_gain_g[] = {
{R_PATH0_TIA_ERR_G0, B_PATH0_TIA_ERR_G0_G_MSK},
{R_PATH0_TIA_ERR_G1, B_PATH0_TIA_ERR_G1_G_MSK},
};
DECLARE_DIG_TABLE(rtw89_8852a_tia_gain_g);
static const struct rtw89_reg_def rtw89_8852a_lna_gain_a[] = {
{R_PATH0_LNA_ERR1, B_PATH0_LNA_ERR_G0_A_MSK},
{R_PATH0_LNA_ERR1, B_PATH0_LNA_ERR_G1_A_MSK},
{R_PATH0_LNA_ERR2, B_PATH0_LNA_ERR_G2_A_MSK},
{R_PATH0_LNA_ERR3, B_PATH0_LNA_ERR_G3_A_MSK},
{R_PATH0_LNA_ERR3, B_PATH0_LNA_ERR_G4_A_MSK},
{R_PATH0_LNA_ERR4, B_PATH0_LNA_ERR_G5_A_MSK},
{R_PATH0_LNA_ERR4, B_PATH0_LNA_ERR_G6_A_MSK},
};
DECLARE_DIG_TABLE(rtw89_8852a_lna_gain_a);
static const struct rtw89_reg_def rtw89_8852a_tia_gain_a[] = {
{R_PATH0_TIA_ERR_G0, B_PATH0_TIA_ERR_G0_A_MSK},
{R_PATH0_TIA_ERR_G1, B_PATH0_TIA_ERR_G1_A_MSK},
};
DECLARE_DIG_TABLE(rtw89_8852a_tia_gain_a);
const struct rtw89_phy_table rtw89_8852a_phy_bb_table = {
.regs = rtw89_8852a_phy_bb_regs,
.n_regs = ARRAY_SIZE(rtw89_8852a_phy_bb_regs),
@ -51042,13 +50998,6 @@ const struct rtw89_txpwr_track_cfg rtw89_8852a_trk_cfg = {
.delta_swingidx_2g_cck_a_p = _txpwr_track_delta_swingidx_2g_cck_a_p,
};
const struct rtw89_phy_dig_gain_table rtw89_8852a_phy_dig_table = {
.cfg_lna_g = &rtw89_8852a_lna_gain_g_table,
.cfg_tia_g = &rtw89_8852a_tia_gain_g_table,
.cfg_lna_a = &rtw89_8852a_lna_gain_a_table,
.cfg_tia_a = &rtw89_8852a_tia_gain_a_table
};
const struct rtw89_rfe_parms rtw89_8852a_dflt_parms = {
.byr_tbl = &rtw89_8852a_byr_table,
.rule_2ghz = {

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@ -11,7 +11,6 @@ extern const struct rtw89_phy_table rtw89_8852a_phy_bb_table;
extern const struct rtw89_phy_table rtw89_8852a_phy_radioa_table;
extern const struct rtw89_phy_table rtw89_8852a_phy_radiob_table;
extern const struct rtw89_phy_table rtw89_8852a_phy_nctl_table;
extern const struct rtw89_phy_dig_gain_table rtw89_8852a_phy_dig_table;
extern const struct rtw89_txpwr_track_cfg rtw89_8852a_trk_cfg;
extern const struct rtw89_rfe_parms rtw89_8852a_dflt_parms;