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drm/tidss: Add support for AM62A7 DSS

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Add support for the DSS controller on TI's AM62A7 SoC in the tidss
driver.

This controller has 2 video pipelines that can render 2 video planes on
over a screen, using the overlay managers. The output of the DSS comes
from video port 2 (VP2) in the form of RGB88 DPI signals, while the VP1
is tied off inside the SoC.

Also add and use a new type of VP, DISPC_VP_TIED_OFF, for the tied-off
VP1 of AM62A DSS.

Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Link: https://lore.kernel.org/r/20231108171619.978438-3-a-bhatia1@ti.com
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
This commit is contained in:
Aradhya Bhatia 2023-11-08 22:46:19 +05:30 committed by Tomi Valkeinen
parent 7959ceb767
commit 5cc5ea7b6d
3 changed files with 63 additions and 0 deletions
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59
drivers/gpu/drm/tidss/tidss_dispc.c
View File

@ -322,6 +322,60 @@ const struct dispc_features dispc_am625_feats = {
.vid_order = { 1, 0 },
};
const struct dispc_features dispc_am62a7_feats = {
/*
* if the code reaches dispc_mode_valid with VP1,
* it should return MODE_BAD.
*/
.max_pclk_khz = {
[DISPC_VP_TIED_OFF] = 0,
[DISPC_VP_DPI] = 165000,
},
.scaling = {
.in_width_max_5tap_rgb = 1280,
.in_width_max_3tap_rgb = 2560,
.in_width_max_5tap_yuv = 2560,
.in_width_max_3tap_yuv = 4096,
.upscale_limit = 16,
.downscale_limit_5tap = 4,
.downscale_limit_3tap = 2,
/*
* The max supported pixel inc value is 255. The value
* of pixel inc is calculated like this: 1+(xinc-1)*bpp.
* The maximum bpp of all formats supported by the HW
* is 8. So the maximum supported xinc value is 32,
* because 1+(32-1)*8 < 255 < 1+(33-1)*4.
*/
.xinc_max = 32,
},
.subrev = DISPC_AM62A7,
.common = "common",
.common_regs = tidss_am65x_common_regs,
.num_vps = 2,
.vp_name = { "vp1", "vp2" },
.ovr_name = { "ovr1", "ovr2" },
.vpclk_name = { "vp1", "vp2" },
/* VP1 of the DSS in AM62A7 SoC is tied off internally */
.vp_bus_type = { DISPC_VP_TIED_OFF, DISPC_VP_DPI },
.vp_feat = { .color = {
.has_ctm = true,
.gamma_size = 256,
.gamma_type = TIDSS_GAMMA_8BIT,
},
},
.num_planes = 2,
/* note: vid is plane_id 0 and vidl1 is plane_id 1 */
.vid_name = { "vid", "vidl1" },
.vid_lite = { false, true, },
.vid_order = { 1, 0 },
};
static const u16 *dispc_common_regmap;
struct dss_vp_data {
@ -824,6 +878,7 @@ dispc_irq_t dispc_read_and_clear_irqstatus(struct dispc_device *dispc)
case DISPC_K2G:
return dispc_k2g_read_and_clear_irqstatus(dispc);
case DISPC_AM625:
case DISPC_AM62A7:
case DISPC_AM65X:
case DISPC_J721E:
return dispc_k3_read_and_clear_irqstatus(dispc);
@ -840,6 +895,7 @@ void dispc_set_irqenable(struct dispc_device *dispc, dispc_irq_t mask)
dispc_k2g_set_irqenable(dispc, mask);
break;
case DISPC_AM625:
case DISPC_AM62A7:
case DISPC_AM65X:
case DISPC_J721E:
dispc_k3_set_irqenable(dispc, mask);
@ -1331,6 +1387,7 @@ void dispc_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane,
x, y, layer);
break;
case DISPC_AM625:
case DISPC_AM62A7:
case DISPC_AM65X:
dispc_am65x_ovr_set_plane(dispc, hw_plane, hw_videoport,
x, y, layer);
@ -2250,6 +2307,7 @@ static void dispc_plane_init(struct dispc_device *dispc)
dispc_k2g_plane_init(dispc);
break;
case DISPC_AM625:
case DISPC_AM62A7:
case DISPC_AM65X:
case DISPC_J721E:
dispc_k3_plane_init(dispc);
@ -2357,6 +2415,7 @@ static void dispc_vp_write_gamma_table(struct dispc_device *dispc,
dispc_k2g_vp_write_gamma_table(dispc, hw_videoport);
break;
case DISPC_AM625:
case DISPC_AM62A7:
case DISPC_AM65X:
dispc_am65x_vp_write_gamma_table(dispc, hw_videoport);
break;

3
drivers/gpu/drm/tidss/tidss_dispc.h
View File

@ -54,12 +54,14 @@ enum dispc_vp_bus_type {
DISPC_VP_DPI, /* DPI output */
DISPC_VP_OLDI, /* OLDI (LVDS) output */
DISPC_VP_INTERNAL, /* SoC internal routing */
DISPC_VP_TIED_OFF, /* Tied off / Unavailable */
DISPC_VP_MAX_BUS_TYPE,
};
enum dispc_dss_subrevision {
DISPC_K2G,
DISPC_AM625,
DISPC_AM62A7,
DISPC_AM65X,
DISPC_J721E,
};
@ -88,6 +90,7 @@ struct dispc_features {
extern const struct dispc_features dispc_k2g_feats;
extern const struct dispc_features dispc_am625_feats;
extern const struct dispc_features dispc_am62a7_feats;
extern const struct dispc_features dispc_am65x_feats;
extern const struct dispc_features dispc_j721e_feats;

1
drivers/gpu/drm/tidss/tidss_drv.c
View File

@ -231,6 +231,7 @@ static void tidss_shutdown(struct platform_device *pdev)
static const struct of_device_id tidss_of_table[] = {
{ .compatible = "ti,k2g-dss", .data = &dispc_k2g_feats, },
{ .compatible = "ti,am625-dss", .data = &dispc_am625_feats, },
{ .compatible = "ti,am62a7-dss", .data = &dispc_am62a7_feats, },
{ .compatible = "ti,am65x-dss", .data = &dispc_am65x_feats, },
{ .compatible = "ti,j721e-dss", .data = &dispc_j721e_feats, },
{ }