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x86/mce: Add a clear_bank() helper

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Add a helper at the end of the MCA polling function to collect vendor and/or
feature actions.

Start with a basic skeleton for now. Actions for AMD thresholding and deferred
errors will be added later.

  [ bp: Drop the obvious comment too. ]

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Nikolay Borisov <nik.borisov@suse.com>
Link: https://lore.kernel.org/20250908-wip-mca-updates-v6-0-eef5d6c74b9c@amd.com
This commit is contained in:
Yazen Ghannam 2025-09-08 15:40:36 +00:00 committed by Borislav Petkov (AMD)
parent 91af6842e9
commit 5c6f123c41
3 changed files with 18 additions and 5 deletions
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5
arch/x86/kernel/cpu/mce/amd.c
View File

@ -955,6 +955,11 @@ static void amd_threshold_interrupt(void)
}
}
void amd_clear_bank(struct mce *m)
{
mce_wrmsrq(mca_msr_reg(m->bank, MCA_STATUS), 0);
}
/*
* Sysfs Interface
*/

15
arch/x86/kernel/cpu/mce/core.c
View File

@ -423,7 +423,7 @@ noinstr u64 mce_rdmsrq(u32 msr)
return EAX_EDX_VAL(val, low, high);
}
static noinstr void mce_wrmsrq(u32 msr, u64 v)
noinstr void mce_wrmsrq(u32 msr, u64 v)
{
u32 low, high;
@ -760,6 +760,14 @@ static bool should_log_poll_error(enum mcp_flags flags, struct mce_hw_err *err)
return true;
}
static void clear_bank(struct mce *m)
{
if (m->cpuvendor == X86_VENDOR_AMD)
return amd_clear_bank(m);
mce_wrmsrq(mca_msr_reg(m->bank, MCA_STATUS), 0);
}
/*
* Poll for corrected events or events that happened before reset.
* Those are just logged through /dev/mcelog.
@ -831,10 +839,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
mce_log(&err);
clear_it:
/*
* Clear state for this bank.
*/
mce_wrmsrq(mca_msr_reg(i, MCA_STATUS), 0);
clear_bank(m);
}
/*

3
arch/x86/kernel/cpu/mce/internal.h
View File

@ -269,6 +269,7 @@ void mce_threshold_create_device(unsigned int cpu);
void mce_threshold_remove_device(unsigned int cpu);
extern bool amd_filter_mce(struct mce *m);
bool amd_mce_usable_address(struct mce *m);
void amd_clear_bank(struct mce *m);
/*
* If MCA_CONFIG[McaLsbInStatusSupported] is set, extract ErrAddr in bits
@ -300,6 +301,7 @@ static inline void mce_threshold_create_device(unsigned int cpu) { }
static inline void mce_threshold_remove_device(unsigned int cpu) { }
static inline bool amd_filter_mce(struct mce *m) { return false; }
static inline bool amd_mce_usable_address(struct mce *m) { return false; }
static inline void amd_clear_bank(struct mce *m) { }
static inline void smca_extract_err_addr(struct mce *m) { }
static inline void smca_bsp_init(void) { }
#endif
@ -319,6 +321,7 @@ static __always_inline void winchip_machine_check(struct pt_regs *regs) {}
#endif
noinstr u64 mce_rdmsrq(u32 msr);
noinstr void mce_wrmsrq(u32 msr, u64 v);
static __always_inline u32 mca_msr_reg(int bank, enum mca_msr reg)
{