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perf arm-spe: Fill branch operations and events to record

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The new added branch operations and events are filled into record, the
information will be consumed when synthesizing samples.

Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Leo Yan <leo.yan@arm.com>
Link: https://lore.kernel.org/r/20250304111240.3378214-10-leo.yan@arm.com
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
This commit is contained in:
Leo Yan 2025-03-04 11:12:37 +00:00 committed by Namhyung Kim
parent faf2260542
commit 5c1b158396
2 changed files with 26 additions and 2 deletions
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18
tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
View File

@ -207,6 +207,18 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder)
break;
case SPE_OP_PKT_HDR_CLASS_BR_ERET:
decoder->record.op |= ARM_SPE_OP_BRANCH_ERET;
if (payload & SPE_OP_PKT_COND)
decoder->record.op |= ARM_SPE_OP_BR_COND;
if (payload & SPE_OP_PKT_INDIRECT_BRANCH)
decoder->record.op |= ARM_SPE_OP_BR_INDIRECT;
if (payload & SPE_OP_PKT_GCS)
decoder->record.op |= ARM_SPE_OP_BR_GCS;
if (SPE_OP_PKT_CR_BL(payload))
decoder->record.op |= ARM_SPE_OP_BR_CR_BL;
if (SPE_OP_PKT_CR_RET(payload))
decoder->record.op |= ARM_SPE_OP_BR_CR_RET;
if (SPE_OP_PKT_CR_NON_BL_RET(payload))
decoder->record.op |= ARM_SPE_OP_BR_CR_NON_BL_RET;
break;
default:
pr_err("Get packet error!\n");
@ -238,6 +250,12 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder)
if (payload & BIT(EV_MISPRED))
decoder->record.type |= ARM_SPE_BRANCH_MISS;
if (payload & BIT(EV_NOT_TAKEN))
decoder->record.type |= ARM_SPE_BRANCH_NOT_TAKEN;
if (payload & BIT(EV_TRANSACTIONAL))
decoder->record.type |= ARM_SPE_IN_TXN;
if (payload & BIT(EV_PARTIAL_PREDICATE))
decoder->record.type |= ARM_SPE_SVE_PARTIAL_PRED;

10
tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
View File

@ -24,6 +24,8 @@ enum arm_spe_sample_type {
ARM_SPE_REMOTE_ACCESS = 1 << 7,
ARM_SPE_SVE_PARTIAL_PRED = 1 << 8,
ARM_SPE_SVE_EMPTY_PRED = 1 << 9,
ARM_SPE_BRANCH_NOT_TAKEN = 1 << 10,
ARM_SPE_IN_TXN = 1 << 11,
};
enum arm_spe_op_type {
@ -52,8 +54,12 @@ enum arm_spe_op_type {
ARM_SPE_OP_SVE_SG = 1 << 27,
/* Second level operation type for BRANCH_ERET */
ARM_SPE_OP_BR_COND = 1 << 16,
ARM_SPE_OP_BR_INDIRECT = 1 << 17,
ARM_SPE_OP_BR_COND = 1 << 16,
ARM_SPE_OP_BR_INDIRECT = 1 << 17,
ARM_SPE_OP_BR_GCS = 1 << 18,
ARM_SPE_OP_BR_CR_BL = 1 << 19,
ARM_SPE_OP_BR_CR_RET = 1 << 20,
ARM_SPE_OP_BR_CR_NON_BL_RET = 1 << 21,
};
enum arm_spe_common_data_source {