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drm/amd/pm: Disable MCLK switching on SI at high pixel clocks
On various SI GPUs, a flickering can be observed near the bottom edge of the screen when using a single 4K 60Hz monitor over DP. Disabling MCLK switching works around this problem. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -3500,6 +3500,11 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
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* for these GPUs to calculate bandwidth requirements.
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*/
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if (high_pixelclock_count) {
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/* Work around flickering lines at the bottom edge
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* of the screen when using a single 4K 60Hz monitor.
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*/
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disable_mclk_switching = true;
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/* On Oland, we observe some flickering when two 4K 60Hz
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* displays are connected, possibly because voltage is too low.
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* Raise the voltage by requiring a higher SCLK.
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