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drm/amd/display: ensure dtbclk clk_src selected before hdmistream_clk_en

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[why]
correct a sequence issue by switching to dcn35's dccg sequence:
to make sure select dtbclk src first before programming hdmistream_clk_en.

Reviewed-by: Leo Chen <leo.chen@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Charlene Liu 2026-06-24 18:54:43 -04:00 committed by Alex Deucher
parent 5a3fb8427e
commit 5b7e4ad090
3 changed files with 6 additions and 3 deletions
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2
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
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@ -1654,7 +1654,7 @@ void dccg35_set_dpstreamclk_root_clock_gating(struct dccg *dccg, int dp_hpo_inst
static void dccg35_set_hdmistreamclk(
void dccg35_set_hdmistreamclk(
struct dccg *dccg,
enum streamclk_source src,
uint32_t otg_inst)

5
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.h
View File

@ -269,5 +269,8 @@ void dccg35_disable_dscclk(struct dccg *dccg, int inst);
void dccg35_enable_symclk_se(struct dccg *dccg, uint32_t stream_enc_inst, uint32_t link_enc_inst);
void dccg35_disable_symclk_se(struct dccg *dccg, uint32_t stream_enc_inst, uint32_t link_enc_inst);
void dccg35_set_hdmistreamclk(
struct dccg *dccg,
enum streamclk_source src,
uint32_t otg_inst);
#endif //__DCN35_DCCG_H__

2
drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c
View File

@ -313,7 +313,7 @@ static void dccg42_init(struct dccg *dccg)
static const struct dccg_funcs dccg42_funcs = {
.enable_hdmicharclk = dccg401_enable_hdmicharclk,
.disable_hdmicharclk = dccg42_disable_hdmicharclk,
.set_hdmistreamclk = dccg401_set_hdmistreamclk,
.set_hdmistreamclk = dccg35_set_hdmistreamclk,
.set_hdmistreamclk_root_clock_gating = dccg35_set_hdmistreamclk_root_clock_gating,
.update_dpp_dto = dccg35_update_dpp_dto,
.dpp_root_clock_control = dccg35_dpp_root_clock_control,