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EDAC/skx_common: Add SubChannel support to ADXL decode
Diamond Rapids server RRL (Retry Read error Log) operates at sub-channel granularity. Add SubChannel support to ADXL decoding in preparation for enabling this feature. Also introduce adxl_component_required() to validate mandatory ADXL components to improve code readability. Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Tested-by: Yi Lai <yi1.lai@intel.com> Link: https://patch.msgid.link/20260521073112.3881223-7-qiuxu.zhuo@intel.com
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@ -31,10 +31,12 @@ static const char * const component_names[] = {
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[INDEX_CHANNEL] = "ChannelId",
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[INDEX_DIMM] = "DimmSlotId",
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[INDEX_CS] = "ChipSelect",
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[INDEX_SUBCH] = "SubChId",
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[INDEX_NM_MEMCTRL] = "NmMemoryControllerId",
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[INDEX_NM_CHANNEL] = "NmChannelId",
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[INDEX_NM_DIMM] = "NmDimmSlotId",
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[INDEX_NM_CS] = "NmChipSelect",
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[INDEX_NM_SUBCH] = "NmSubChId",
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};
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static int component_indices[ARRAY_SIZE(component_names)];
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@ -43,6 +45,7 @@ static const char * const *adxl_component_names;
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static u64 *adxl_values;
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static char *adxl_msg;
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static unsigned long adxl_nm_bitmap;
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static unsigned long adxl_bitmap;
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static char skx_msg[MSG_SIZE];
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static skx_decode_f driver_decode;
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@ -288,6 +291,15 @@ void skx_show_rrl(struct decoded_addr *res, char *msg, int len, bool scrub_err)
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}
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EXPORT_SYMBOL_GPL(skx_show_rrl);
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static bool adxl_component_required(int idx)
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{
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return idx == INDEX_SOCKET ||
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idx == INDEX_MEMCTRL ||
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idx == INDEX_CHANNEL ||
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idx == INDEX_DIMM ||
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idx == INDEX_CS;
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}
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int skx_adxl_get(void)
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{
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const char * const *names;
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@ -306,12 +318,14 @@ int skx_adxl_get(void)
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if (i >= INDEX_NM_FIRST)
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adxl_nm_bitmap |= 1 << i;
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else
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adxl_bitmap |= 1 << i;
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break;
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}
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}
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if (!names[j] && i < INDEX_NM_FIRST)
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if (!names[j] && adxl_component_required(i))
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goto err;
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}
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@ -438,11 +452,15 @@ static bool skx_adxl_decode(struct decoded_addr *res, enum error_source err_src)
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(int)adxl_values[component_indices[INDEX_NM_DIMM]] : -1;
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res->cs = (adxl_nm_bitmap & BIT_NM_CS) ?
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(int)adxl_values[component_indices[INDEX_NM_CS]] : -1;
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res->subch = (adxl_nm_bitmap & BIT_NM_SUBCH) ?
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(int)adxl_values[component_indices[INDEX_NM_SUBCH]] : -1;
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} else {
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res->imc = (int)adxl_values[component_indices[INDEX_MEMCTRL]];
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res->channel = (int)adxl_values[component_indices[INDEX_CHANNEL]];
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res->dimm = (int)adxl_values[component_indices[INDEX_DIMM]];
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res->cs = (int)adxl_values[component_indices[INDEX_CS]];
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res->subch = (adxl_bitmap & BIT_SUBCH) ?
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(int)adxl_values[component_indices[INDEX_SUBCH]] : -1;
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}
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if (res->imc < 0) {
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@ -210,11 +210,13 @@ enum {
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INDEX_CHANNEL,
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INDEX_DIMM,
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INDEX_CS,
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INDEX_SUBCH,
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INDEX_NM_FIRST,
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INDEX_NM_MEMCTRL = INDEX_NM_FIRST,
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INDEX_NM_CHANNEL,
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INDEX_NM_DIMM,
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INDEX_NM_CS,
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INDEX_NM_SUBCH,
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INDEX_MAX
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};
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@ -225,10 +227,12 @@ enum error_source {
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ERR_SRC_NOT_MEMORY,
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};
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#define BIT_SUBCH BIT_ULL(INDEX_SUBCH)
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#define BIT_NM_MEMCTRL BIT_ULL(INDEX_NM_MEMCTRL)
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#define BIT_NM_CHANNEL BIT_ULL(INDEX_NM_CHANNEL)
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#define BIT_NM_DIMM BIT_ULL(INDEX_NM_DIMM)
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#define BIT_NM_CS BIT_ULL(INDEX_NM_CS)
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#define BIT_NM_SUBCH BIT_ULL(INDEX_NM_SUBCH)
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struct decoded_addr {
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struct mce *mce;
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@ -242,6 +246,7 @@ struct decoded_addr {
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int chanways;
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int dimm;
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int cs;
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int subch;
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int rank;
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int channel_rank;
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u64 rank_address;
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