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net: phy: tja11xx: enable PHY in sleep mode for TJA1102S
Due to pin strapping the PHY maybe disabled per default. TJA1102 devices can be enabled by setting the PHY_EN bit. Support is provided for TJA1102S devices but can be easily added for TJA1102 too. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Dimitri Fedrau <dimitri.fedrau@liebherr.com> Link: https://patch.msgid.link/20250304-tja1102s-support-v2-2-cd3e61ab920f@liebherr.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -28,6 +28,7 @@
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#define MII_ECTRL_POWER_MODE_MASK GENMASK(14, 11)
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#define MII_ECTRL_POWER_MODE_NO_CHANGE (0x0 << 11)
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#define MII_ECTRL_POWER_MODE_NORMAL (0x3 << 11)
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#define MII_ECTRL_POWER_MODE_SLEEP (0xa << 11)
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#define MII_ECTRL_POWER_MODE_STANDBY (0xc << 11)
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#define MII_ECTRL_CABLE_TEST BIT(5)
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#define MII_ECTRL_CONFIG_EN BIT(2)
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@ -79,6 +80,9 @@
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#define MII_COMMCFG 27
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#define MII_COMMCFG_AUTO_OP BIT(15)
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#define MII_CFG3 28
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#define MII_CFG3_PHY_EN BIT(0)
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/* Configure REF_CLK as input in RMII mode */
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#define TJA110X_RMII_MODE_REFCLK_IN BIT(0)
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@ -180,6 +184,14 @@ static int tja11xx_wakeup(struct phy_device *phydev)
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return ret;
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return tja11xx_enable_link_control(phydev);
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case MII_ECTRL_POWER_MODE_SLEEP:
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switch (phydev->phy_id & PHY_ID_MASK) {
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case PHY_ID_TJA1102S:
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/* Enable PHY, maybe it is disabled due to pin strapping */
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return phy_set_bits(phydev, MII_CFG3, MII_CFG3_PHY_EN);
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default:
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return 0;
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}
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default:
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break;
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}
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