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drm/panel: jadard-jd9365da-h3: support Waveshare WXGA DSI panels
Add configuration for several Waveshare 8.0" and 10.1" WXGA DSI panels using JD9365 controller Tested-by: Riccardo Mereu <r.mereu@arduino.cc> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260413-waveshare-dsi-touch-v3-15-3aeb53022c32@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
This commit is contained in:
Dmitry Baryshkov
parent
ba362fb2e7
commit
5a7770a06f
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@ -2067,6 +2067,566 @@ static const struct jadard_panel_desc waveshare_4_0_inch_c_desc = {
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MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS,
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};
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static int waveshare_8_0_a_init(struct jadard *jadard)
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{
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struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi };
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jd9365da_switch_page(&dsi_ctx, 0x00);
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jadard_enable_standard_cmds(&dsi_ctx);
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jd9365da_switch_page(&dsi_ctx, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x00);
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if (jadard->dsi->lanes == 4)
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x7e);
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else
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x4e);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x65);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x74);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xb7);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0xb7);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xfe);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x19);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x05);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x70);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0xff);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0xff);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0xff);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xa0);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1e);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x0f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x28);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0x04);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0xa9);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x0a);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0a);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x37);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x19);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x78);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x63);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x54);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x49);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x45);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x38);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x3d);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x28);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x43);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x41);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x43);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x62);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x50);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x57);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x49);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x44);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x37);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x23);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x10);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x78);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x63);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x54);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x49);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x45);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x38);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x3d);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x28);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x43);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x41);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x43);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x62);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x50);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x57);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x49);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x44);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x37);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x23);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x10);
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jd9365da_switch_page(&dsi_ctx, 0x02);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x47);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x47);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x45);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x45);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x4b);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x4b);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x49);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x49);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x41);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0b, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x5f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x5f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x57);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x77);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x35);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x46);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x46);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x44);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x44);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x4a);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x4a);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x48);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x48);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x40);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x5f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x5f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x57);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x77);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x35);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x1f);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x10);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x06);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x40);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x02);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x30);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x02);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x03);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x6b);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x05);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x0c);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x73);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x09);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x03);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x56);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x08);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x04);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x04);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x88);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x06);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x7b);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xf8);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0xd5);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x2e);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x12);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x03);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x03);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x7b);
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jd9365da_switch_page(&dsi_ctx, 0x04);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x0e);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0xb3);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x60);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x2a);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x59);
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if (jadard->dsi->lanes != 4) {
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x58);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x0f);
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}
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jd9365da_switch_page(&dsi_ctx, 0x00);
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mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
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msleep(120);
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mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
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msleep(60);
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return 0;
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}
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static const struct drm_display_mode waveshare_8_0_a_mode = {
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.clock = (800 + 40 + 20 + 20) * (1280 + 30 + 12 + 4) * 60 / 1000,
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.hdisplay = 800,
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.hsync_start = 800 + 40,
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.hsync_end = 800 + 40 + 20,
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.htotal = 800 + 40 + 20 + 20,
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.vdisplay = 1280,
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.vsync_start = 1280 + 30,
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.vsync_end = 1280 + 30 + 12,
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.vtotal = 1280 + 30 + 12 + 4,
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.width_mm = 107,
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.height_mm = 172,
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.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
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};
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static const struct jadard_panel_desc waveshare_8_0_inch_a_desc = {
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.mode_4ln = &waveshare_8_0_a_mode,
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.mode_2ln = &waveshare_8_0_a_mode,
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.format = MIPI_DSI_FMT_RGB888,
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.init = waveshare_8_0_a_init,
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.mode_flags = MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO |
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MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS,
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};
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static const struct drm_display_mode waveshare_10_1_a_mode = {
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.clock = (800 + 40 + 20 + 20) * (1280 + 20 + 20 + 4) * 60 / 1000,
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.hdisplay = 800,
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.hsync_start = 800 + 40,
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.hsync_end = 800 + 40 + 20,
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.htotal = 800 + 40 + 20 + 20,
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.vdisplay = 1280,
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.vsync_start = 1280 + 20,
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.vsync_end = 1280 + 20 + 20,
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.vtotal = 1280 + 20 + 20 + 4,
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.width_mm = 135,
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.height_mm = 216,
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.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
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};
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static int waveshare_10_1_a_init(struct jadard *jadard)
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{
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struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi };
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jd9365da_switch_page(&dsi_ctx, 0x00);
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jadard_enable_standard_cmds(&dsi_ctx);
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jd9365da_switch_page(&dsi_ctx, 0x01);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x00);
|
||||
if (jadard->dsi->lanes == 4) {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x3b);
|
||||
} else {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x38);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x10);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x38);
|
||||
}
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x74);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xaf);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0xaf);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x26);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x09);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x04);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x01);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x78);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0xff);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0xff);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x7f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xa0);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x81);
|
||||
if (jadard->dsi->lanes == 4) {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x14);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x23);
|
||||
} else {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x0d);
|
||||
}
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x28);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x69);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x2a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x17);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x7f);
|
||||
if (jadard->dsi->lanes == 4) {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x6b);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x5c);
|
||||
} else {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x6a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x5b);
|
||||
}
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x4f);
|
||||
if (jadard->dsi->lanes == 4) {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x4d);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x3f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x42);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x2b);
|
||||
} else {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x4a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x3d);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x41);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x2a);
|
||||
}
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x44);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x43);
|
||||
if (jadard->dsi->lanes == 4) {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x43);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x63);
|
||||
} else {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x44);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x62);
|
||||
}
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x52);
|
||||
if (jadard->dsi->lanes == 4) {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x5a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x4f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x4e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x20);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x0f);
|
||||
} else {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x59);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x4c);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x48);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x3a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x26);
|
||||
}
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x7f);
|
||||
if (jadard->dsi->lanes == 4) {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x6b);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x5c);
|
||||
} else {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x6a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x5b);
|
||||
}
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x4f);
|
||||
if (jadard->dsi->lanes == 4) {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x4d);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x3f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x42);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x2b);
|
||||
} else {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x4a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x3d);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x41);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x2a);
|
||||
}
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x44);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x43);
|
||||
if (jadard->dsi->lanes == 4) {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x43);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x63);
|
||||
} else {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x44);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x62);
|
||||
}
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x52);
|
||||
if (jadard->dsi->lanes == 4) {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x5a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x4f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x4e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x20);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x0f);
|
||||
} else {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x59);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x4c);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x48);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x3a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x26);
|
||||
}
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x00);
|
||||
|
||||
jd9365da_switch_page(&dsi_ctx, 0x02);
|
||||
if (jadard->dsi->lanes == 4) {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x02);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x02);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x1e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x1e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x17);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0x17);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0b, 0x37);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x37);
|
||||
} else {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x42);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x42);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x40);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x40);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x5e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x5e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x5f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x5f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x5f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x57);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0x57);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0b, 0x77);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x77);
|
||||
}
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x47);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x47);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x45);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x45);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x4b);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x4b);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x49);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x49);
|
||||
if (jadard->dsi->lanes == 4) {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x01);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x01);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x1e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x1e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x17);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x17);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x37);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x37);
|
||||
} else {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x5f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x41);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x41);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x40);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x40);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x5e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x5e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x5f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x5f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x5f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x57);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x57);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x77);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x77);
|
||||
}
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x46);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x46);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x44);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x44);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x4a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x4a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x48);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x48);
|
||||
if (jadard->dsi->lanes == 4)
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x1f);
|
||||
else
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x5f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2c, 0x01);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2d, 0x01);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2e, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2f, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x1e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x1e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x17);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x17);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x37);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x37);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x08);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x08);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x0a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x0a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0x04);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0x04);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x06);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x02);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x02);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x1e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x1e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4a, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0x17);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4c, 0x17);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4d, 0x37);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4e, 0x37);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4f, 0x09);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x09);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x0b);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x0b);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x05);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0x05);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x07);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x07);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x1f);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x30);
|
||||
if (jadard->dsi->lanes == 4)
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x16);
|
||||
else
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x34);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x05);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x02);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x6a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x73);
|
||||
if (jadard->dsi->lanes == 4)
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x1d);
|
||||
else
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x07);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x08);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x6a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x08);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x88);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xff);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0xdd);
|
||||
if (jadard->dsi->lanes == 4)
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x3f);
|
||||
else
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x2c);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x15);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x17);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x14);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x82);
|
||||
|
||||
jd9365da_switch_page(&dsi_ctx, 0x04);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x0e);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0xb3);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x61);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x48);
|
||||
if (jadard->dsi->lanes != 4) {
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x58);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x0f);
|
||||
}
|
||||
|
||||
jd9365da_switch_page(&dsi_ctx, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe6, 0x02);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe7, 0x0c);
|
||||
mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
|
||||
msleep(120);
|
||||
mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
|
||||
msleep(60);
|
||||
|
||||
return dsi_ctx.accum_err;
|
||||
}
|
||||
|
||||
static const struct jadard_panel_desc waveshare_10_1_inch_a_desc = {
|
||||
.mode_4ln = &waveshare_10_1_a_mode,
|
||||
.mode_2ln = &waveshare_10_1_a_mode,
|
||||
.format = MIPI_DSI_FMT_RGB888,
|
||||
.init = waveshare_10_1_a_init,
|
||||
.mode_flags = MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO |
|
||||
MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS,
|
||||
};
|
||||
|
||||
static int jadard_dsi_probe(struct mipi_dsi_device *dsi)
|
||||
{
|
||||
struct device *dev = &dsi->dev;
|
||||
|
|
@ -2198,6 +2758,14 @@ static const struct of_device_id jadard_of_match[] = {
|
|||
.compatible = "waveshare,4.0-dsi-touch-c",
|
||||
.data = &waveshare_4_0_inch_c_desc
|
||||
},
|
||||
{
|
||||
.compatible = "waveshare,8.0-dsi-touch-a",
|
||||
.data = &waveshare_8_0_inch_a_desc
|
||||
},
|
||||
{
|
||||
.compatible = "waveshare,10.1-dsi-touch-a",
|
||||
.data = &waveshare_10_1_inch_a_desc
|
||||
},
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, jadard_of_match);
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user