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arm64: dts: renesas: r8a779f0: Add thermal support

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Add support for 3 TSC nodes of thermal. The 4th node is for the control
domain and not for Linux.

Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
[wsa: rebased, fixed resource size, removed unused 4th node breaking probe]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220525151355.24175-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Linh Phung 2022-05-25 17:13:55 +02:00 committed by Geert Uytterhoeven
parent dc24257124
commit 5a3ad6f466
1 changed files with 56 additions and 0 deletions
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56
arch/arm64/boot/dts/renesas/r8a779f0.dtsi
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@ -157,6 +157,18 @@ sysc: system-controller@e6180000 {
#power-domain-cells = <1>;
};
tsc: thermal@e6198000 {
compatible = "renesas,r8a779f0-thermal";
/* The 4th sensor is in control domain and not for Linux */
reg = <0 0xe6198000 0 0x200>,
<0 0xe61a0000 0 0x200>,
<0 0xe61a8000 0 0x200>;
clocks = <&cpg CPG_MOD 919>;
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
resets = <&cpg 919>;
#thermal-sensor-cells = <1>;
};
i2c0: i2c@e6500000 {
compatible = "renesas,i2c-r8a779f0",
"renesas,rcar-gen4-i2c";
@ -360,6 +372,50 @@ prr: chipid@fff00044 {
};
};
thermal-zones {
sensor_thermal1: sensor1-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsc 0>;
trips {
sensor1_crit: sensor1-crit {
temperature = <120000>;
hysteresis = <1000>;
type = "critical";
};
};
};
sensor_thermal2: sensor2-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsc 1>;
trips {
sensor2_crit: sensor2-crit {
temperature = <120000>;
hysteresis = <1000>;
type = "critical";
};
};
};
sensor_thermal3: sensor3-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsc 2>;
trips {
sensor3_crit: sensor3-crit {
temperature = <120000>;
hysteresis = <1000>;
type = "critical";
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,