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perf vendor events intel: Update cascadelakex metric units
The updated metrics were published in:
2dce436130
Signed-off-by: Ian Rogers <irogers@google.com>
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
This commit is contained in:
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@ -22,7 +22,7 @@
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"Unit": "CHA"
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},
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{
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"BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.ia_miss",
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"BriefDescription": "LLC misses - Uncacheable reads (from cpu). Derived from unc_cha_tor_inserts.ia_miss",
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"Counter": "0,1,2,3",
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"EventCode": "0x35",
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"EventName": "LLC_MISSES.UNCACHEABLE",
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@ -316,32 +316,32 @@
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Intel Optane DC persistent memory bandwidth read (MB/sec). Derived from unc_m_pmm_rpq_inserts",
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"BriefDescription": "Intel Optane DC persistent memory bandwidth read (MiB/sec). Derived from unc_m_pmm_rpq_inserts",
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"Counter": "0,1,2,3",
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"EventCode": "0xE3",
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"EventName": "UNC_M_PMM_BANDWIDTH.READ",
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"PerPkg": "1",
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"ScaleUnit": "6.103515625E-5MB/sec",
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"ScaleUnit": "6.103515625E-5MiB/sec",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Intel Optane DC persistent memory bandwidth total (MB/sec). Derived from unc_m_pmm_rpq_inserts",
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"BriefDescription": "Intel Optane DC persistent memory bandwidth total (MiB/sec). Derived from unc_m_pmm_rpq_inserts",
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"Counter": "0,1,2,3",
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"EventCode": "0xE3",
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"EventName": "UNC_M_PMM_BANDWIDTH.TOTAL",
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"MetricExpr": "UNC_M_PMM_RPQ_INSERTS + UNC_M_PMM_WPQ_INSERTS",
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"MetricName": "UNC_M_PMM_BANDWIDTH.TOTAL",
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"PerPkg": "1",
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"ScaleUnit": "6.103515625E-5MB/sec",
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"ScaleUnit": "6.103515625E-5MiB/sec",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Intel Optane DC persistent memory bandwidth write (MB/sec). Derived from unc_m_pmm_wpq_inserts",
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"BriefDescription": "Intel Optane DC persistent memory bandwidth write (MiB/sec). Derived from unc_m_pmm_wpq_inserts",
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"Counter": "0,1,2,3",
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"EventCode": "0xE7",
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"EventName": "UNC_M_PMM_BANDWIDTH.WRITE",
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"PerPkg": "1",
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"ScaleUnit": "6.103515625E-5MB/sec",
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"ScaleUnit": "6.103515625E-5MiB/sec",
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"Unit": "iMC"
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},
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{
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