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drm/amd/display: init code for external panel replay

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Prepare for supporting panel replay on external monitors.

Reviewed-by: Robin Chen <robin.chen@amd.com>
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Peichen Huang <PeiChen.Huang@amd.com>
Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Peichen Huang 2025-12-15 15:38:26 +08:00 committed by Alex Deucher
parent a036db3953
commit 5a113e15d1
6 changed files with 47 additions and 21 deletions
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2
drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c
View File

@ -69,7 +69,7 @@ bool dmub_hw_lock_mgr_does_link_require_lock(const struct dc *dc, const struct d
if (link->psr_settings.psr_version == DC_PSR_VERSION_SU_1)
return true;
if (link->replay_settings.replay_feature_enabled)
if (link->replay_settings.replay_feature_enabled && dc_is_embedded_signal(link->connector_signal))
return true;
if (link->psr_settings.psr_version == DC_PSR_VERSION_1) {

4
drivers/gpu/drm/amd/display/dc/inc/link_service.h
View File

@ -283,8 +283,6 @@ struct link_service {
bool (*edp_set_replay_allow_active)(struct dc_link *dc_link,
const bool *enable, bool wait, bool force_static,
const unsigned int *power_opts);
bool (*dp_setup_replay)(struct dc_link *link,
const struct dc_stream_state *stream);
bool (*edp_send_replay_cmd)(struct dc_link *link,
enum replay_FW_Message_type msg,
union dmub_replay_cmd_set *cmd_data);
@ -304,6 +302,8 @@ struct link_service {
bool (*edp_receiver_ready_T9)(struct dc_link *link);
bool (*edp_receiver_ready_T7)(struct dc_link *link);
bool (*edp_power_alpm_dpcd_enable)(struct dc_link *link, bool enable);
bool (*dp_setup_replay)(struct dc_link *link, const struct dc_stream_state *stream);
bool (*dp_pr_get_panel_inst)(const struct dc *dc, const struct dc_link *link, unsigned int *inst_out);
bool (*dp_pr_enable)(struct dc_link *link, bool enable);
bool (*dp_pr_update_state)(struct dc_link *link, struct dmub_cmd_pr_update_state_data *update_state_data);
bool (*dp_pr_set_general_cmd)(struct dc_link *link, struct dmub_cmd_pr_general_cmd_data *general_cmd_data);

4
drivers/gpu/drm/amd/display/dc/link/link_dpms.c
View File

@ -46,6 +46,7 @@
#include "protocols/link_dp_capability.h"
#include "protocols/link_dp_training.h"
#include "protocols/link_edp_panel_control.h"
#include "protocols/link_dp_panel_replay.h"
#include "protocols/link_dp_dpia_bw.h"
#include "dm_helpers.h"
@ -2529,6 +2530,9 @@ void link_set_dpms_on(
link_set_dsc_enable(pipe_ctx, true);
}
if (link->replay_settings.config.replay_supported && !dc_is_embedded_signal(link->connector_signal))
dp_setup_replay(link, stream);
status = enable_link(state, pipe_ctx);
if (status != DC_OK) {

1
drivers/gpu/drm/amd/display/dc/link/link_factory.c
View File

@ -236,6 +236,7 @@ static void construct_link_service_edp_panel_control(struct link_service *link_s
static void construct_link_service_dp_panel_replay(struct link_service *link_srv)
{
link_srv->dp_setup_replay = dp_setup_replay;
link_srv->dp_pr_get_panel_inst = dp_pr_get_panel_inst;
link_srv->dp_pr_enable = dp_pr_enable;
link_srv->dp_pr_update_state = dp_pr_update_state;
link_srv->dp_pr_set_general_cmd = dp_pr_set_general_cmd;

53
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
View File

@ -75,7 +75,7 @@ static bool dp_setup_panel_replay(struct dc_link *link, const struct dc_stream_s
if (!replay)
return false;
if (!dc_get_edp_link_panel_inst(dc, link, &panel_inst))
if (!dp_pr_get_panel_inst(dc, link, &panel_inst))
return false;
replay_context.aux_inst = link->ddc->ddc_pin->hw_info.ddc_channel;
@ -103,14 +103,18 @@ static bool dp_setup_panel_replay(struct dc_link *link, const struct dc_stream_s
link->replay_settings.replay_feature_enabled = dp_pr_copy_settings(link, &replay_context);
if (link->replay_settings.replay_feature_enabled) {
pr_config_1.bits.PANEL_REPLAY_ENABLE = 1;
pr_config_1.bits.PANEL_REPLAY_CRC_ENABLE = 1;
pr_config_1.bits.IRQ_HPD_ASSDP_MISSING = 1;
pr_config_1.bits.IRQ_HPD_VSCSDP_UNCORRECTABLE_ERROR = 1;
pr_config_1.bits.IRQ_HPD_RFB_ERROR = 1;
pr_config_1.bits.IRQ_HPD_ACTIVE_FRAME_CRC_ERROR = 1;
pr_config_1.bits.PANEL_REPLAY_SELECTIVE_UPDATE_ENABLE = 1;
pr_config_1.bits.PANEL_REPLAY_EARLY_TRANSPORT_ENABLE = 1;
if (dc_is_embedded_signal(link->connector_signal)) {
pr_config_1.bits.PANEL_REPLAY_ENABLE = 1;
pr_config_1.bits.PANEL_REPLAY_CRC_ENABLE = 1;
pr_config_1.bits.IRQ_HPD_ASSDP_MISSING = 1;
pr_config_1.bits.IRQ_HPD_VSCSDP_UNCORRECTABLE_ERROR = 1;
pr_config_1.bits.IRQ_HPD_RFB_ERROR = 1;
pr_config_1.bits.IRQ_HPD_ACTIVE_FRAME_CRC_ERROR = 1;
pr_config_1.bits.PANEL_REPLAY_SELECTIVE_UPDATE_ENABLE = 1;
pr_config_1.bits.PANEL_REPLAY_EARLY_TRANSPORT_ENABLE = 1;
} else {
pr_config_1.bits.PANEL_REPLAY_ENABLE = 1;
}
pr_config_2.bits.SINK_REFRESH_RATE_UNLOCK_GRANTED = 0;
@ -147,6 +151,23 @@ static bool dp_setup_panel_replay(struct dc_link *link, const struct dc_stream_s
return true;
}
bool dp_pr_get_panel_inst(const struct dc *dc,
const struct dc_link *link,
unsigned int *inst_out)
{
if (dc_is_embedded_signal(link->connector_signal)) {
/* TODO: just get edp link panel inst for now, fix it */
return dc_get_edp_link_panel_inst(dc, link, inst_out);
} else if (dc_is_dp_sst_signal(link->connector_signal)) {
/* TODO: just set to 1 for now, fix it */
*inst_out = 1;
return true;
}
return false;
}
bool dp_setup_replay(struct dc_link *link, const struct dc_stream_state *stream)
{
if (!link)
@ -165,7 +186,7 @@ bool dp_pr_enable(struct dc_link *link, bool enable)
unsigned int panel_inst = 0;
union dmub_rb_cmd cmd;
if (!dc_get_edp_link_panel_inst(dc, link, &panel_inst))
if (!dp_pr_get_panel_inst(dc, link, &panel_inst))
return false;
if (link->replay_settings.replay_allow_active != enable) {
@ -192,16 +213,16 @@ bool dp_pr_copy_settings(struct dc_link *link, struct replay_context *replay_con
union dmub_rb_cmd cmd;
struct pipe_ctx *pipe_ctx = NULL;
if (!dc_get_edp_link_panel_inst(dc, link, &panel_inst))
if (!dp_pr_get_panel_inst(dc, link, &panel_inst))
return false;
for (unsigned int i = 0; i < MAX_PIPES; i++) {
if (dc->current_state->res_ctx.pipe_ctx[i].stream &&
dc->current_state->res_ctx.pipe_ctx[i].stream->link &&
dc->current_state->res_ctx.pipe_ctx[i].stream->link == link &&
dc->current_state->res_ctx.pipe_ctx[i].stream->link->connector_signal == SIGNAL_TYPE_EDP) {
dc_is_dp_sst_signal(dc->current_state->res_ctx.pipe_ctx[i].stream->link->connector_signal)) {
pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i];
//TODO: refactor for multi edp support
/* todo: need update for MST */
break;
}
}
@ -255,7 +276,7 @@ bool dp_pr_update_state(struct dc_link *link, struct dmub_cmd_pr_update_state_da
unsigned int panel_inst = 0;
union dmub_rb_cmd cmd;
if (!dc_get_edp_link_panel_inst(dc, link, &panel_inst))
if (!dp_pr_get_panel_inst(dc, link, &panel_inst))
return false;
memset(&cmd, 0, sizeof(cmd));
@ -276,7 +297,7 @@ bool dp_pr_set_general_cmd(struct dc_link *link, struct dmub_cmd_pr_general_cmd_
unsigned int panel_inst = 0;
union dmub_rb_cmd cmd;
if (!dc_get_edp_link_panel_inst(dc, link, &panel_inst))
if (!dp_pr_get_panel_inst(dc, link, &panel_inst))
return false;
memset(&cmd, 0, sizeof(cmd));
@ -298,7 +319,7 @@ bool dp_pr_get_state(const struct dc_link *link, uint64_t *state)
uint32_t retry_count = 0;
uint32_t replay_state = 0;
if (!dc_get_edp_link_panel_inst(dc, link, &panel_inst))
if (!dp_pr_get_panel_inst(dc, link, &panel_inst))
return false;
do {

4
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.h
View File

@ -27,8 +27,8 @@
#include "link_service.h"
bool dp_setup_replay(struct dc_link *link,
const struct dc_stream_state *stream);
bool dp_setup_replay(struct dc_link *link, const struct dc_stream_state *stream);
bool dp_pr_get_panel_inst(const struct dc *dc, const struct dc_link *link, unsigned int *inst_out);
bool dp_pr_enable(struct dc_link *link, bool enable);
bool dp_pr_copy_settings(struct dc_link *link, struct replay_context *replay_context);
bool dp_pr_update_state(struct dc_link *link, struct dmub_cmd_pr_update_state_data *update_state_data);