From 59c10c7fdebe1412f976021dd588afae431147f2 Mon Sep 17 00:00:00 2001 From: Fugang Duan Date: Tue, 18 Aug 2015 13:41:51 +0800 Subject: [PATCH] MLK-11373: ARM: dts: i.MX7d: add gpmi nand support for 7d-sdb board Add gpmi nand support on i.MX7D sdb board. Signed-off-by: Han Xu Signed-off-by: Fugang Duan --- arch/arm/boot/dts/imx7d-sdb-gpmi-weim.dts | 25 +++++++++++++++++++ arch/arm/boot/dts/imx7d-sdb.dts | 29 +++++++++++++++++++++++ arch/arm/boot/dts/imx7d.dtsi | 15 ++++++++++++ 3 files changed, 69 insertions(+) create mode 100644 arch/arm/boot/dts/imx7d-sdb-gpmi-weim.dts diff --git a/arch/arm/boot/dts/imx7d-sdb-gpmi-weim.dts b/arch/arm/boot/dts/imx7d-sdb-gpmi-weim.dts new file mode 100644 index 000000000000..2014f0a976ba --- /dev/null +++ b/arch/arm/boot/dts/imx7d-sdb-gpmi-weim.dts @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx7d-sdb.dts" + +&gpmi{ + status = "okay"; +}; + +&sai1{ + status = "disabled"; +}; + +&usdhc3{ + status = "disabled"; +}; + +&uart5{ + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts index 98d62601cd57..cf487540448c 100644 --- a/arch/arm/boot/dts/imx7d-sdb.dts +++ b/arch/arm/boot/dts/imx7d-sdb.dts @@ -266,6 +266,13 @@ &i2c4 { status = "okay"; }; +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand_1>; + status = "disabled"; + nand-on-flash-bbt; +}; + &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog_1>; @@ -314,6 +321,28 @@ MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x1 >; }; + pinctrl_gpmi_nand_1: gpmi-nand-1 { + fsl,pins = < + MX7D_PAD_SD3_CLK__NAND_CLE 0x71 + MX7D_PAD_SD3_CMD__NAND_ALE 0x71 + MX7D_PAD_SAI1_MCLK__NAND_WP_B 0x71 + MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71 + MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B 0x71 + MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74 + MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71 + MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71 + MX7D_PAD_SD3_DATA0__NAND_DATA00 0x71 + MX7D_PAD_SD3_DATA1__NAND_DATA01 0x71 + MX7D_PAD_SD3_DATA2__NAND_DATA02 0x71 + MX7D_PAD_SD3_DATA3__NAND_DATA03 0x71 + MX7D_PAD_SD3_DATA4__NAND_DATA04 0x71 + MX7D_PAD_SD3_DATA5__NAND_DATA05 0x71 + MX7D_PAD_SD3_DATA6__NAND_DATA06 0x71 + MX7D_PAD_SD3_DATA7__NAND_DATA07 0x71 + + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index eda401326a0b..3f620d7bf588 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -376,6 +376,21 @@ dma_apbh: dma-apbh@33000000 { clocks = <&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>, <&clks IMX7D_NAND_ROOT_CLK>; clock-names = "dma_apbh_bch", "dma_apbh_io"; + }; + + gpmi: gpmi-nand@33002000{ + compatible = "fsl,imx7d-gpmi-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x33002000 0x2000>, <0x33004000 0x4000>; + reg-names = "gpmi-nand", "bch"; + interrupts = ; + interrupt-names = "bch"; + clocks = <&clks IMX7D_NAND_ROOT_CLK>, + <&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>; + clock-names = "gpmi_io", "gpmi_bch_apb"; + dmas = <&dma_apbh 0>; + dma-names = "rx-tx"; status = "disabled"; };