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x86: Reenable TSC sync check at boot, even with NONSTOP_TSC
commit6c56ccecf0upstream. Commit83ce4009did the following change If the TSC is constant and non-stop, also set it reliable. But, there seems to be few systems that will end up with TSC warp across sockets, depending on how the cpus come out of reset. Skipping TSC sync test on such systems may result in time inconsistency later. So, reenable TSC sync test even on constant and non-stop TSC systems. Set, sched_clock_stable to 1 by default and reset it in mark_tsc_unstable, if TSC sync fails. This change still gives perf benefit mentioned in83ce4009for systems where TSC is reliable. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> LKML-Reference: <20091217202702.GA18015@linux-os.sc.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -70,7 +70,6 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
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if (c->x86_power & (1 << 8)) {
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set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
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set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
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set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE);
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sched_clock_stable = 1;
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}
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@ -763,6 +763,7 @@ void mark_tsc_unstable(char *reason)
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{
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if (!tsc_unstable) {
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tsc_unstable = 1;
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sched_clock_stable = 0;
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printk(KERN_INFO "Marking TSC unstable due to %s\n", reason);
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/* Change only the rating, when not registered */
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if (clocksource_tsc.mult)
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