github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-24 23:22:31 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

Allwinner Clk fixes for 6.13

Browse Source 
Only one patch, accidentally left out of the 6.13 pull request.
 The patch enables automatic clk reparenting for MMC clocks on A100,
 thereby fixing MMC support.
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmd+ifkOHHdlbnNAY3Np
 ZS5vcmcACgkQOJpUIZwPJDCeYQ/+NHBPCEPSWzDqyY4yoCMVUjiiYYYPGSYPpcxI
 UV2py1Uu+qjAQV+xR7ffDtnF7v0hHWNjULx+CqtSDnE9guuRazQJXgnUfY8P0TUf
 JWIjRG8aHFrXVjKazv6IQrj8+8fEKTw5GsuZUclnxmvpzcZoVNp62Wg67XbyrnTY
 P99/o3Pfg/c3wifo7Xhgq0iu2XzhWkpEqA2/lYLj5KwstQ/2wQUXHnHjSK0HA3eA
 hdI6RKKX9EQHDni8MEmzgFbdWU5aH2UwMwknO+jVRToGz82jBlXVfYVdEfnJ0hap
 nliavVt2JFVQIT0V5OTSaudrkdDX9YbchpwStk6ua7uAc1WDUpcK316gX5QmCoja
 jVvSecX9oZ/DCnMwWQq3Fcxblo+bTZ2+KvIeuT2uvgDchxmhRjCWdDdPD387nC8H
 638jgL9CgiwJ/uP2HwoVOxQjHM0BkvgxT9Ie/o5ZQ8KWELeL2ncN5QGeB6qATQdj
 4rLExfmbkhmtkk0mkOwdWMZszfApuyNcOnQvU8fqGR0t2TeMWLBo4KC/mfcVTnvP
 yz/cIPVH+WIQPZEC1Kv7hZJ66EdFc70/YDBW1E4PmEFYyFQ+jc2HRPt9mkGWqjCJ
 wUeSN9JavVmTeAwaJUHkUUODsWNMW1xEOLyjOZIRjMCpu8uRf6xn+GFF5es9yRsh
 Tqbg980=
 =5Aso
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clk-fixes-for-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-fixes

Pull an Allwinner clk driver fix from Chen-Yu Tsai:

Only one patch, accidentally left out of the 6.13 pull request.
The patch enables automatic clk reparenting for MMC clocks on A100,
thereby fixing MMC support.

* tag 'sunxi-clk-fixes-for-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  clk: sunxi-ng: a100: enable MMC clock reparenting
This commit is contained in:
Stephen Boyd 2025-01-08 11:56:01 -08:00
commit 590a094e7b
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/clk/sunxi-ng/ccu-sun50i-a100.c
View File

@ -436,7 +436,7 @@ static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc0_clk, "mmc0", mmc_parents, 0x830,
24, 2, /* mux */
BIT(31), /* gate */
2, /* post-div */
CLK_SET_RATE_NO_REPARENT);
0);
static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc1_clk, "mmc1", mmc_parents, 0x834,
0, 4, /* M */
@ -444,7 +444,7 @@ static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc1_clk, "mmc1", mmc_parents, 0x834,
24, 2, /* mux */
BIT(31), /* gate */
2, /* post-div */
CLK_SET_RATE_NO_REPARENT);
0);
static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc2_clk, "mmc2", mmc_parents, 0x838,
0, 4, /* M */
@ -452,7 +452,7 @@ static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc2_clk, "mmc2", mmc_parents, 0x838,
24, 2, /* mux */
BIT(31), /* gate */
2, /* post-div */
CLK_SET_RATE_NO_REPARENT);
0);
static SUNXI_CCU_GATE(bus_mmc0_clk, "bus-mmc0", "ahb3", 0x84c, BIT(0), 0);
static SUNXI_CCU_GATE(bus_mmc1_clk, "bus-mmc1", "ahb3", 0x84c, BIT(1), 0);