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dt-bindings: iommu: ti,omap-iommu: Convert to DT schema
Convert Texas Instruments OMAP2+ IOMMU from text to DT schema. Make the 'ti,hwmods' property optional and mark it deprecated as it is no longer used, it is kept to support legacy dtbs. Signed-off-by: Bhargav Joshi <j.bhargav.u@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
Bhargav Joshi
Will Deacon
parent
8cdeaa50ea
commit
57f63e7082
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OMAP2+ IOMMU
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Required properties:
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- compatible : Should be one of,
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"ti,omap2-iommu" for OMAP2/OMAP3 IOMMU instances
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"ti,omap4-iommu" for OMAP4/OMAP5 IOMMU instances
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"ti,dra7-dsp-iommu" for DRA7xx DSP IOMMU instances
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"ti,dra7-iommu" for DRA7xx IOMMU instances
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- ti,hwmods : Name of the hwmod associated with the IOMMU instance
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- reg : Address space for the configuration registers
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- interrupts : Interrupt specifier for the IOMMU instance
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- #iommu-cells : Should be 0. OMAP IOMMUs are all "single-master" devices,
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and needs no additional data in the pargs specifier. Please
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also refer to the generic bindings document for more info
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on this property,
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Documentation/devicetree/bindings/iommu/iommu.txt
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Optional properties:
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- ti,#tlb-entries : Number of entries in the translation look-aside buffer.
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Should be either 8 or 32 (default: 32)
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- ti,iommu-bus-err-back : Indicates the IOMMU instance supports throwing
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back a bus error response on MMU faults.
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- ti,syscon-mmuconfig : Should be a pair of the phandle to the DSP_SYSTEM
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syscon node that contains the additional control
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register for enabling the MMU, and the MMU instance
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number (0-indexed) within the sub-system. This property
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is required for DSP IOMMU instances on DRA7xx SoCs. The
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instance number should be 0 for DSP MDMA MMUs and 1 for
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DSP EDMA MMUs.
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Example:
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/* OMAP3 ISP MMU */
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mmu_isp: mmu@480bd400 {
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#iommu-cells = <0>;
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compatible = "ti,omap2-iommu";
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reg = <0x480bd400 0x80>;
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interrupts = <24>;
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ti,hwmods = "mmu_isp";
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ti,#tlb-entries = <8>;
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};
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/* DRA74x DSP2 MMUs */
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mmu0_dsp2: mmu@41501000 {
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compatible = "ti,dra7-dsp-iommu";
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reg = <0x41501000 0x100>;
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interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "mmu0_dsp2";
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#iommu-cells = <0>;
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ti,syscon-mmuconfig = <&dsp2_system 0x0>;
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};
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mmu1_dsp2: mmu@41502000 {
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compatible = "ti,dra7-dsp-iommu";
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reg = <0x41502000 0x100>;
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interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "mmu1_dsp2";
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#iommu-cells = <0>;
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ti,syscon-mmuconfig = <&dsp2_system 0x1>;
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};
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114
Documentation/devicetree/bindings/iommu/ti,omap-iommu.yaml
Normal file
114
Documentation/devicetree/bindings/iommu/ti,omap-iommu.yaml
Normal file
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@ -0,0 +1,114 @@
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iommu/ti,omap-iommu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: OMAP2+ IOMMU
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maintainers:
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- Bhargav Joshi <j.bhargav.u@gmail.com>
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properties:
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compatible:
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enum:
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- ti,omap2-iommu
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- ti,omap4-iommu
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- ti,dra7-dsp-iommu
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- ti,dra7-iommu
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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'#iommu-cells':
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const: 0
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ti,#tlb-entries:
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description: Number of entries in the translation look-aside buffer.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [8, 32]
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default: 32
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ti,iommu-bus-err-back:
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description:
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Indicates the IOMMU instance supports throwing back a bus error response
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on MMU faults.
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type: boolean
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ti,syscon-mmuconfig:
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description:
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Pair of the phandle to the DSP_SYSTEM syscon node that
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contains the additional control register for enabling the MMU, and the
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MMU instance number (0-indexed) within the sub-system. The instance number
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should be 0 for DSP MDMA MMUs and 1 for DSP EDMA MMUs.
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$ref: /schemas/types.yaml#/definitions/phandle-array
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maxItems: 1
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items:
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items:
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- description: phandle to the DSP_SYSTEM syscon node
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- description: MMU instance number
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enum: [0, 1]
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ti,hwmods:
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description: Name of the hwmod associated with the IOMMU instance
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$ref: /schemas/types.yaml#/definitions/string
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deprecated: true
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required:
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- compatible
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- reg
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- '#iommu-cells'
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- interrupts
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: ti,dra7-dsp-iommu
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then:
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required:
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- ti,syscon-mmuconfig
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else:
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properties:
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ti,syscon-mmuconfig: false
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additionalProperties: false
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examples:
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- |
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mmu@480bd400 {
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#iommu-cells = <0>;
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compatible = "ti,omap2-iommu";
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reg = <0x480bd400 0x80>;
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interrupts = <24>;
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ti,hwmods = "mmu_isp";
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ti,#tlb-entries = <8>;
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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mmu@41501000 {
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compatible = "ti,dra7-dsp-iommu";
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reg = <0x41501000 0x100>;
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interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "mmu0_dsp2";
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#iommu-cells = <0>;
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ti,syscon-mmuconfig = <&dsp2_system 0x0>;
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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mmu@41502000 {
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compatible = "ti,dra7-dsp-iommu";
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reg = <0x41502000 0x100>;
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interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "mmu1_dsp2";
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#iommu-cells = <0>;
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ti,syscon-mmuconfig = <&dsp2_system 0x1>;
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};
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