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drm/amdgpu/gfx7: align mqd settings with KFD
Make sure to set the quantum bits in the compute MQD for better fairness across queues of the same priority. Reviewed-by: Jesse Zhang <jesse.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2819,6 +2819,7 @@ static void gfx_v7_0_mqd_init(struct amdgpu_device *adev,
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{
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u64 hqd_gpu_addr;
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u64 wb_gpu_addr;
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u32 tmp;
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/* init the mqd struct */
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memset(mqd, 0, sizeof(struct cik_mqd));
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@ -2923,7 +2924,11 @@ static void gfx_v7_0_mqd_init(struct amdgpu_device *adev,
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mqd->cp_hqd_atomic1_preop_lo = RREG32(mmCP_HQD_ATOMIC1_PREOP_LO);
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mqd->cp_hqd_atomic1_preop_hi = RREG32(mmCP_HQD_ATOMIC1_PREOP_HI);
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mqd->cp_hqd_pq_rptr = RREG32(mmCP_HQD_PQ_RPTR);
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mqd->cp_hqd_quantum = RREG32(mmCP_HQD_QUANTUM);
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tmp = RREG32(mmCP_HQD_QUANTUM);
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tmp = REG_SET_FIELD(tmp, CP_HQD_QUANTUM, QUANTUM_EN, 1);
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tmp = REG_SET_FIELD(tmp, CP_HQD_QUANTUM, QUANTUM_SCALE, 1);
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tmp = REG_SET_FIELD(tmp, CP_HQD_QUANTUM, QUANTUM_DURATION, 10);
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mqd->cp_hqd_quantum = tmp;
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mqd->cp_hqd_pipe_priority = RREG32(mmCP_HQD_PIPE_PRIORITY);
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mqd->cp_hqd_queue_priority = RREG32(mmCP_HQD_QUEUE_PRIORITY);
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mqd->cp_hqd_iq_rptr = RREG32(mmCP_HQD_IQ_RPTR);
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