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arm64: dts: meson: a1: add definitions for meson PWM

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The chip has 3 dual-channel PWM modules PWM_AB, PWM_CD, PWM_EF those
can be connected to various digital I/O pins.

Each of 6 PWM is driven by individually selected clock parent and
8-bit divider. The PWM signal is generated using two 16-bit counters.

Signed-off-by: George Stark <gnstark@salutedevices.com>
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240710234116.2370655-4-gnstark@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
This commit is contained in:
George Stark 2024-07-11 02:41:16 +03:00 committed by Neil Armstrong
parent 9852d85ec9
commit 5774b1e217
1 changed files with 215 additions and 0 deletions
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215
arch/arm64/boot/dts/amlogic/meson-a1.dtsi
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@ -245,6 +245,188 @@ mux {
};
};
pwm_a_pins1: pwm-a-pins1 {
mux {
groups = "pwm_a_x6";
function = "pwm_a";
};
};
pwm_a_pins2: pwm-a-pins2 {
mux {
groups = "pwm_a_x7";
function = "pwm_a";
};
};
pwm_a_pins3: pwm-a-pins3 {
mux {
groups = "pwm_a_f10";
function = "pwm_a";
};
};
pwm_a_pins4: pwm-a-pins4 {
mux {
groups = "pwm_a_f6";
function = "pwm_a";
};
};
pwm_a_pins5: pwm-a-pins5 {
mux {
groups = "pwm_a_a";
function = "pwm_a";
};
};
pwm_b_pins1: pwm-b-pins1 {
mux {
groups = "pwm_b_x";
function = "pwm_b";
};
};
pwm_b_pins2: pwm-b-pins2 {
mux {
groups = "pwm_b_f";
function = "pwm_b";
};
};
pwm_b_pins3: pwm-b-pins3 {
mux {
groups = "pwm_b_a";
function = "pwm_b";
};
};
pwm_c_pins1: pwm-c-pins1 {
mux {
groups = "pwm_c_x";
function = "pwm_c";
};
};
pwm_c_pins2: pwm-c-pins2 {
mux {
groups = "pwm_c_f3";
function = "pwm_c";
};
};
pwm_c_pins3: pwm-c-pins3 {
mux {
groups = "pwm_c_f8";
function = "pwm_c";
};
};
pwm_c_pins4: pwm-c-pins4 {
mux {
groups = "pwm_c_a";
function = "pwm_c";
};
};
pwm_d_pins1: pwm-d-pins1 {
mux {
groups = "pwm_d_x15";
function = "pwm_d";
};
};
pwm_d_pins2: pwm-d-pins2 {
mux {
groups = "pwm_d_x13";
function = "pwm_d";
};
};
pwm_d_pins3: pwm-d-pins3 {
mux {
groups = "pwm_d_x10";
function = "pwm_d";
};
};
pwm_d_pins4: pwm-d-pins4 {
mux {
groups = "pwm_d_f";
function = "pwm_d";
};
};
pwm_e_pins1: pwm-e-pins1 {
mux {
groups = "pwm_e_p";
function = "pwm_e";
};
};
pwm_e_pins2: pwm-e-pins2 {
mux {
groups = "pwm_e_x16";
function = "pwm_e";
};
};
pwm_e_pins3: pwm-e-pins3 {
mux {
groups = "pwm_e_x14";
function = "pwm_e";
};
};
pwm_e_pins4: pwm-e-pins4 {
mux {
groups = "pwm_e_x2";
function = "pwm_e";
};
};
pwm_e_pins5: pwm-e-pins5 {
mux {
groups = "pwm_e_f";
function = "pwm_e";
};
};
pwm_e_pins6: pwm-e-pins6 {
mux {
groups = "pwm_e_a";
function = "pwm_e";
};
};
pwm_f_pins1: pwm-f-pins1 {
mux {
groups = "pwm_f_b";
function = "pwm_f";
};
};
pwm_f_pins2: pwm-f-pins2 {
mux {
groups = "pwm_f_x";
function = "pwm_f";
};
};
pwm_f_pins3: pwm-f-pins3 {
mux {
groups = "pwm_f_f4";
function = "pwm_f";
};
};
pwm_f_pins4: pwm-f-pins4 {
mux {
groups = "pwm_f_f12";
function = "pwm_f";
};
};
sdio_pins: sdio {
mux0 {
groups = "sdcard_d0_x",
@ -340,6 +522,28 @@ uart_AO_B: serial@2000 {
status = "disabled";
};
pwm_ab: pwm@2400 {
compatible = "amlogic,meson-a1-pwm",
"amlogic,meson-s4-pwm";
reg = <0x0 0x2400 0x0 0x24>;
#pwm-cells = <3>;
clocks = <&clkc_periphs CLKID_PWM_A>,
<&clkc_periphs CLKID_PWM_B>;
power-domains = <&pwrc PWRC_I2C_ID>;
status = "disabled";
};
pwm_cd: pwm@2800 {
compatible = "amlogic,meson-a1-pwm",
"amlogic,meson-s4-pwm";
reg = <0x0 0x2800 0x0 0x24>;
#pwm-cells = <3>;
clocks = <&clkc_periphs CLKID_PWM_C>,
<&clkc_periphs CLKID_PWM_D>;
power-domains = <&pwrc PWRC_I2C_ID>;
status = "disabled";
};
saradc: adc@2c00 {
compatible = "amlogic,meson-g12a-saradc",
"amlogic,meson-saradc";
@ -423,6 +627,17 @@ sec_AO: ao-secure@5a20 {
amlogic,has-chip-id;
};
pwm_ef: pwm@5400 {
compatible = "amlogic,meson-a1-pwm",
"amlogic,meson-s4-pwm";
reg = <0x0 0x5400 0x0 0x24>;
#pwm-cells = <3>;
clocks = <&clkc_periphs CLKID_PWM_E>,
<&clkc_periphs CLKID_PWM_F>;
power-domains = <&pwrc PWRC_I2C_ID>;
status = "disabled";
};
clkc_pll: pll-clock-controller@7c80 {
compatible = "amlogic,a1-pll-clkc";
reg = <0 0x7c80 0 0x18c>;