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riscv: dts: thead: add DPU and HDMI device tree nodes
T-Head TH1520 SoC contains a Verisilicon DC8200 display controller (called DPU in manual) and a Synopsys DesignWare HDMI TX controller. Add device tree nodes to them. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Tested-by: Han Gao <gaohan@iscas.ac.cn> Tested-by: Michal Wilczynski <m.wilczynski@samsung.com> Reviewed-by: Drew Fustini <fustini@kernel.org> Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Signed-off-by: Drew Fustini <fustini@kernel.org>
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@ -585,6 +585,72 @@ clk_vo: clock-controller@ffef528050 {
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#clock-cells = <1>;
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};
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hdmi: hdmi@ffef540000 {
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compatible = "thead,th1520-dw-hdmi";
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reg = <0xff 0xef540000 0x0 0x40000>;
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reg-io-width = <4>;
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interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_vo CLK_HDMI_PCLK>,
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<&clk_vo CLK_HDMI_SFR>,
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<&clk_vo CLK_HDMI_CEC>,
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<&clk_vo CLK_HDMI_PIXCLK>;
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clock-names = "iahb", "isfr", "cec", "pix";
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resets = <&rst TH1520_RESET_ID_HDMI>,
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<&rst TH1520_RESET_ID_HDMI_APB>;
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reset-names = "main", "apb";
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hdmi_in: endpoint {
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remote-endpoint = <&dpu_out_dp1>;
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};
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};
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hdmi_out_port: port@1 {
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reg = <1>;
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};
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};
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};
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dpu: display@ffef600000 {
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compatible = "thead,th1520-dc8200", "verisilicon,dc";
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reg = <0xff 0xef600000 0x0 0x100000>;
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interrupts = <93 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_vo CLK_DPU_CCLK>,
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<&clk_vo CLK_DPU_ACLK>,
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<&clk_vo CLK_DPU_HCLK>,
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<&clk_vo CLK_DPU_PIXELCLK0>,
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<&clk_vo CLK_DPU_PIXELCLK1>;
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clock-names = "core", "axi", "ahb", "pix0", "pix1";
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resets = <&rst TH1520_RESET_ID_DPU_CORE>,
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<&rst TH1520_RESET_ID_DPU_AXI>,
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<&rst TH1520_RESET_ID_DPU_AHB>;
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reset-names = "core", "axi", "ahb";
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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dpu_port1: port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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dpu_out_dp1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&hdmi_in>;
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};
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};
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};
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};
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dmac0: dma-controller@ffefc00000 {
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compatible = "snps,axi-dma-1.01a";
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reg = <0xff 0xefc00000 0x0 0x1000>;
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