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clk: rockchip: rk3399: Add and export SCLK_RGA_CORE clock id

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Change-Id: Ia64289f565e7b4570c6b55810bda5d4711a7381a
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
This commit is contained in:
Xing Zheng 2016-04-19 09:13:29 +08:00 committed by Gerrit Code Review
parent 06ed11d415
commit 56291663d1
2 changed files with 2 additions and 2 deletions
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2
drivers/clk/rockchip/clk-rk3399.c
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@ -771,7 +771,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
RK3399_CLKGATE_CON(16), 1, GFLAGS),
/* rga */
COMPOSITE(0, "clk_rga_core", mux_pll_src_cpll_gpll_npll_ppll_p, 0,
COMPOSITE(SCLK_RGA_CORE, "clk_rga_core", mux_pll_src_cpll_gpll_npll_ppll_p, 0,
RK3399_CLKSEL_CON(12), 6, 2, MFLAGS, 0, 5, DFLAGS,
RK3399_CLKGATE_CON(4), 10, GFLAGS),

2
include/dt-bindings/clock/rk3399-cru.h
View File

@ -72,7 +72,7 @@
#define SCLK_MACREF_OUT 106
#define SCLK_VOP0_PWM 107
#define SCLK_VOP1_PWM 108
#define SCLK_RGA 109
#define SCLK_RGA_CORE 109
#define SCLK_ISP0 110
#define SCLK_ISP1 111
#define SCLK_HDMI_CEC 112