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Merge branch 'develop' of lhh@10.10.10.201:/home/rockchip/rk2818/kernel into develop

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This commit is contained in:
lhh 2010-09-25 20:07:13 +08:00
commit 561f217f9c
21 changed files with 639 additions and 439 deletions
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2
arch/arm/mach-rk2818/clock.c
View File

@ -410,7 +410,7 @@ static const struct rockchip_pll_set arm_pll[] = {
// clk_hz = 24*clkf/(clkr*clkod) clkr clkf clkod hdiv pdiv flags (pdiv=1,2,4,no 3!!)
ARM_PLL(576 * SCU_CLK_MHZ, 4, 96, 1, 12, 31, 41, 1),
ARM_PLL(384 * SCU_CLK_MHZ, 3, 96, 2, 8, 21, 41, 1),
ARM_PLL(192 * SCU_CLK_MHZ, 4, 96, 3, 4, 21, 21, 1),
ARM_PLL(192 * SCU_CLK_MHZ, 4, 96, 3, 4, 11, 41, 1),
// last item, pll power down. set real clk == SCU_ARM_MID_CLK
ARM_PLL( 24 * SCU_CLK_MHZ, 4, 48, 1, 6, 31, 21, 0), // POWER down
};

2
arch/arm/mach-rk2818/include/mach/spi_fpga.h
View File

@ -528,7 +528,7 @@ typedef enum eSpiGpioPinIntIsr
extern struct spi_fpga_port *pFpgaPort;
#if SPI_FPGA_TRANS_WORK
extern int spi_write_work(struct spi_device *spi, const u8 *buf, size_t len);
extern int spi_write_work(struct spi_device *spi, u8 *buf, size_t len);
#endif
extern unsigned int spi_in(struct spi_fpga_port *port, int reg, int type);
extern void spi_out(struct spi_fpga_port *port, int reg, int value, int type);

30
drivers/cmmb/cmmb_class.c
View File

@ -173,6 +173,21 @@ void cmmb_unregister_device(struct cmmb_device *cmmbdev)
}
EXPORT_SYMBOL(cmmb_unregister_device);
ssize_t cmmb_class_show_name(struct class * class, char * buf, size_t count, loff_t off)
{
#if defined(CONFIG_IFxxx_CMMB_Chip_Support)
memcpy(buf,"inno",5);
return 5;
#else
memcpy(buf,"siano",6);
return 6;
#endif
}
static CLASS_ATTR(name, 0777, cmmb_class_show_name, NULL);
static int __init init_cmmbclass(void)
{
int retval;
@ -199,8 +214,12 @@ static int __init init_cmmbclass(void)
retval = PTR_ERR(cmmb_class);
goto error;
}
cmmb_register_adapter("cmmb_adapter", NULL);
retval = class_create_file(cmmb_class, &class_attr_name);
if(retval < 0)
{
DBGERR("cmmb_class create attribute failed\n");
}
cmmb_register_adapter("cmmb_adapter", NULL);
return 0;
@ -213,12 +232,13 @@ static int __init init_cmmbclass(void)
static void __exit exit_cmmbclass(void)
{
DBG("[CMMB HW]:[class]: exit_cmmbclass\n");
DBG("[CMMB HW]:[class]: exit_cmmbclass\n");
class_destroy(cmmb_class);
cdev_del(&cmmb_device_cdev);
cmmb_unregister_adapter(&CMMB_adapter);
cmmb_unregister_adapter(&CMMB_adapter);
unregister_chrdev_region(MKDEV(CMMB_MAJOR, 0), MAX_CMMB_MINORS);
class_remove_file(cmmb_class, &class_attr_name);
class_destroy(cmmb_class);
}

35
drivers/cmmb/cmmb_memory.c
View File

@ -3,7 +3,7 @@
#include <linux/errno.h>
#include <linux/workqueue.h>
#include <asm/atomic.h>
#include <linux/vmalloc.h>
#if 1
#define DBGERR(x...) printk(KERN_INFO x)
#else
@ -31,9 +31,9 @@ static int cmmbmemo_release(struct inode *inode, struct file *file)
cmmb_memo->usr--;
if(cmmb_memo->usr == 0){
kfree(cmmb_memo->video_buf);
kfree(cmmb_memo->audio_buf);
kfree(cmmb_memo->data_buf);
vfree(cmmb_memo->video_buf);
vfree(cmmb_memo->audio_buf);
vfree(cmmb_memo->data_buf);
mutex_unlock(&cmmb_memo->mutex);
DBG("[CMMB HW]:[memory]: enter cmmb av memory release free buffer\n");
} else{
@ -63,7 +63,8 @@ static int cmmbmemo_open(struct inode * inode, struct file * file)
cmmbmemo->audio_buf = NULL;
cmmbmemo->data_buf = NULL;
cmmbmemo->video_buf = kmalloc(CMMB_VIDEO_BUFFER_SIZE+1, GFP_KERNEL);
//cmmbmemo->video_buf = vmalloc(CMMB_VIDEO_BUFFER_SIZE+1, GFP_KERNEL);
cmmbmemo->video_buf = vmalloc(CMMB_VIDEO_BUFFER_SIZE+1);
if (cmmbmemo->video_buf == NULL){
ret = - ENOMEM;
@ -71,15 +72,17 @@ static int cmmbmemo_open(struct inode * inode, struct file * file)
goto kmalloc_fail;
}
cmmbmemo->audio_buf = kmalloc(CMMB_AUDIO_BUFFER_SIZE+1, GFP_KERNEL);
//cmmbmemo->audio_buf = vmalloc(CMMB_AUDIO_BUFFER_SIZE+1, GFP_KERNEL);
cmmbmemo->audio_buf = vmalloc(CMMB_AUDIO_BUFFER_SIZE+1);
if (cmmbmemo->audio_buf == NULL){
ret = - ENOMEM;
DBGERR("[CMMB HW]:[memory]:[err]: cmmb audio buffer malloc fail!!!\n");
goto kmalloc_fail;
}
cmmbmemo->data_buf = kmalloc(1, GFP_KERNEL);
cmmbmemo->data_buf = vmalloc(1);
if (cmmbmemo->data_buf == NULL){
ret = - ENOMEM;
@ -100,9 +103,9 @@ static int cmmbmemo_open(struct inode * inode, struct file * file)
return ret;
kmalloc_fail:
kfree(cmmbmemo->video_buf);
kfree(cmmbmemo->audio_buf);
kfree(cmmbmemo->data_buf);
vfree(cmmbmemo->video_buf);
vfree(cmmbmemo->audio_buf);
vfree(cmmbmemo->data_buf);
mutex_unlock(&cmmbmemo->mutex);
return ret;
}
@ -252,30 +255,36 @@ static ssize_t cmmbmemo_write(struct file *file, char __user *buf, size_t count,
ret = cmmb_ringbuffer_write(&cmmbmemo->buffer_Video, buf, count);
}
//cmmbmemo->w_datatype = CMMB_NULL_TYPE;
#if 0
spin_lock(cmmbmemo->buffer_Video.lock);
cmmbmemo->buffer_Video.condition = 1;
spin_unlock(cmmbmemo->buffer_Video.lock);
wake_up_interruptible(&cmmbmemo->buffer_Video.queue);
#endif
}else if (cmmbmemo->w_datatype == CMMB_AUDIO_TYPE){
free_A = cmmb_ringbuffer_free(&cmmbmemo->buffer_Audio);
if (free_A >= count){
ret = cmmb_ringbuffer_write(&cmmbmemo->buffer_Audio, buf, count);
}
//cmmbmemo->w_datatype = CMMB_NULL_TYPE;
#if 0
spin_lock(cmmbmemo->buffer_Audio.lock);
cmmbmemo->buffer_Audio.condition = 1;
spin_unlock(cmmbmemo->buffer_Audio.lock);
wake_up_interruptible(&cmmbmemo->buffer_Audio.queue);
#endif
//wake_up_interruptible(&cmmbmemo->buffer_Audio.queue);
}else if(cmmbmemo->w_datatype == CMMB_DATA_TYPE){
free_D = cmmb_ringbuffer_free(&cmmbmemo->buffer_Data);
if (free_D >= count){
ret = cmmb_ringbuffer_write(&cmmbmemo->buffer_Data, buf, count);
}
//cmmbmemo->w_datatype = CMMB_NULL_TYPE;
#if 0
spin_lock(cmmbmemo->buffer_Data.lock);
cmmbmemo->buffer_Data.condition = 1;
spin_unlock(cmmbmemo->buffer_Data.lock);
wake_up_interruptible(&cmmbmemo->buffer_Data.queue);
#endif
//wake_up_interruptible(&cmmbmemo->buffer_Data.queue);
}
return ret;

6
drivers/cmmb/siano/Kconfig
View File

@ -4,7 +4,7 @@
config SMS_SIANO_MDTV
tristate "Siano SMS1xxx based MDTV receiver"
default y
default M
---help---
Choose Y or M here if you have MDTV receiver with a Siano chipset.
@ -51,13 +51,13 @@ endif # SMS_HOSTLIB_SUBSYS
# Hardware interfaces support
config SMS_USB_DRV
bool "USB interface support"
tristate "USB interface support"
default n
---help---
Choose if you would like to have Siano's support for USB interface
config SMS_SDIO_DRV
bool "SDIO interface support"
tristate "SDIO interface support"
default n
---help---
Choose if you would like to have Siano's support for SDIO interface

17
drivers/cmmb/siano/smschar.c
View File

@ -205,7 +205,6 @@ static int smschar_open(struct inode *inode, struct file *file)
if(g_has_opened_first==0 && dev->device_index==0)
{
smsspi_poweron();
g_has_opened_first=1;
printk("open first********\n");
@ -778,16 +777,16 @@ int smschar_register(void)
}
// init_waitqueue_head(&g_pnp_event);
smschr_dev_class = class_create(THIS_MODULE, "smsmdtv");
smschr_dev_class= class_create(THIS_MODULE, "cmmb_demodulator");
if(IS_ERR(smschr_dev_class)){
sms_err("Could not create sms char device class\n");
return -1;
}
sms_power_dev = device_create(smschr_dev_class,NULL,0,"%s","power_state") ;
if(sms_power_dev)
{
rc = device_create_file(sms_power_dev, &dev_attr_suspend) ;
}
//sms_power_dev = device_create(smschr_dev_class,NULL,0,"%s","power_state") ;
//if(sms_power_dev)
//{
//rc = device_create_file(sms_power_dev, &dev_attr_suspend) ;
//}
//android_register_early_suspend(&smsspi_android_suspend);//hzb
return smscore_register_hotplug(smschar_hotplug);
}
@ -799,10 +798,10 @@ void smschar_unregister(void)
int i;
for( i = 0; i < SMSCHAR_NR_DEVS; i++)
device_destroy(smschr_dev_class, MKDEV(smschar_major, i));
class_destroy(smschr_dev_class);
unregister_chrdev_region(devno, SMSCHAR_NR_DEVS);
smscore_unregister_hotplug(smschar_hotplug);
//android_unregister_early_suspend(&smsspi_android_suspend);
class_destroy(smschr_dev_class);
sms_info("unregistered\n");
}

125
drivers/cmmb/siano/smscoreapi.c
View File

@ -27,7 +27,9 @@
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/uaccess.h>
#if SIANO_HALFDUPLEX
#include <asm/semaphore.h>
#endif
#include <linux/firmware.h>
#include <asm/byteorder.h>
@ -60,6 +62,13 @@ MODULE_PARM_DESC(debug, "set debug level (info=1, adv=2 (or-able))");
//static int default_mode = 4;
static int default_mode = DEVICE_MODE_CMMB;
#if SIANO_HALFDUPLEX
extern int g_IsTokenEnable;
extern int g_IsTokenOwned;
extern struct semaphore HalfDuplexSemaphore;
#endif
module_param(default_mode, int, 0644);
MODULE_PARM_DESC(default_mode, "default firmware id (device mode)");
@ -132,6 +141,7 @@ struct smscore_device_t {
static struct smscore_device_t* panic_core_dev = NULL ;
void smscore_panic_print(void)
@ -542,8 +552,6 @@ static int smscore_load_firmware_family2(struct smscore_device_t *coredev,
u8 *payload = firmware->Payload;
int rc = 0;
int index = 0;
firmware->StartAddress = le32_to_cpu(firmware->StartAddress);
firmware->Length = le32_to_cpu(firmware->Length);
@ -567,10 +575,9 @@ static int smscore_load_firmware_family2(struct smscore_device_t *coredev,
msg = kmalloc(PAGE_SIZE, GFP_KERNEL | GFP_DMA);
if (!msg)
return -ENOMEM;
#if 1
// while (index < 300)//hzb test 0527
//while (1)//hzb test 0527
{
index++;
//if (coredev->mode != DEVICE_MODE_NONE) //hzb test 0527
{
@ -582,12 +589,10 @@ static int smscore_load_firmware_family2(struct smscore_device_t *coredev,
&coredev->version_ex_done);
// mem_address = *(u32 *) &payload[20];
sms_info("sms get version req ret=0x%x",rc);
mdelay(5);
//mdelay(5);
}
}//hzb test 0527
#endif
#if 1
while (size && rc >= 0) {
struct SmsDataDownload_ST *DataMsg =
(struct SmsDataDownload_ST *) msg;
@ -648,7 +653,7 @@ static int smscore_load_firmware_family2(struct smscore_device_t *coredev,
}
msleep(500);
}
#endif
sms_debug("rc=%d, postload=%p ", rc, coredev->postload_handler);
kfree(msg);
@ -977,7 +982,24 @@ int smscore_set_device_mode(struct smscore_device_t *coredev, int mode)
}
if (rc >= 0) {
sms_err("device is ready");
sms_info("device is ready");
{
struct SmsMsgHdr_ST *msg;
msg = kmalloc(sizeof(struct SmsMsgHdr_ST), GFP_KERNEL | GFP_DMA);
sms_debug("sending MSG_SMS_GET_VERSION_EX_REQ command.");
SMS_INIT_MSG(msg, MSG_SMS_GET_VERSION_EX_REQ,sizeof(struct SmsMsgHdr_ST));
smsendian_handle_tx_message((struct SmsMsgHdr_ST *)msg);
rc = smscore_sendrequest_and_wait(coredev, msg, msg->msgLength, &coredev->version_ex_done);
kfree(msg);
}
#if SIANO_HALFDUPLEX
g_IsTokenEnable = true;
g_IsTokenOwned = true;
up(&HalfDuplexSemaphore);
sms_debug("g_IsTokenEnable = true \n");
#endif
coredev->mode = mode;
coredev->device_flags &= ~SMS_DEVICE_NOT_READY;
}
@ -1127,30 +1149,6 @@ void smscore_onresponse(struct smscore_device_t *coredev,
static int data_total; /* = 0; */
unsigned long time_now = jiffies_to_msecs(jiffies);
//for test , print the version , zyc
if(0)
{
struct SmsVersionRes_ST *vers = (struct SmsVersionRes_ST *)phdr;
if(phdr->msgType == MSG_SMS_GET_VERSION_EX_RES)
{
smsendian_handle_rx_message((struct SmsMsgData_ST *)phdr);
//struct SmsVersionRes_ST *ver = (struct SmsVersionRes_ST *) phdr;
sms_debug("MSG_SMS_GET_VERSION_EX_RES "
"id %d prots 0x%x ver %d.%d\n",
vers->FirmwareId,
vers->SupportedProtocols,
vers->RomVersionMajor,
vers->RomVersionMinor);
}
}
if (!last_sample_time)
last_sample_time = time_now;
@ -1170,20 +1168,24 @@ void smscore_onresponse(struct smscore_device_t *coredev,
if (client)
{
//sms_debug("client=0x %x\n", client);
sms_debug("client=0x %x\n", client);
rc = client->onresponse_handler(client->context, cb);
}
//sms_debug("onresponse_handler ret = 0x%x\n", rc);
// sms_debug("phdr->msgType %d\n", phdr->msgType);
if (rc < 0) {
sms_debug("onresponse_handler ret = 0x%x\n", rc);
sms_debug("phdr->msgType %d\n", phdr->msgType);
#if SIANO_HALFDUPLEX
if (phdr->msgType==MSG_SMS_SPI_HALFDUPLEX_TOKEN_DEVICE_TO_HOST){
g_IsTokenOwned = true;
sms_debug("MSG_SMS_SPI_HALFDUPLEX_TOKEN_DEVICE_TO_HOST \n");
return;
}
#endif
if (rc < 0){
smsendian_handle_rx_message((struct SmsMsgData_ST *)phdr);
switch (phdr->msgType) {
case MSG_SMS_GET_VERSION_EX_RES: {
struct SmsVersionRes_ST *ver = (struct SmsVersionRes_ST *)phdr;
struct SmsVersionRes_ST *ver = (struct SmsVersionRes_ST *) phdr;
sms_debug("MSG_SMS_GET_VERSION_EX_RES "
"id %d prots 0x%x ver %d.%d",
@ -1191,7 +1193,18 @@ void smscore_onresponse(struct smscore_device_t *coredev,
ver->SupportedProtocols,
ver->RomVersionMajor,
ver->RomVersionMinor);
printk("MSG_SMS_GET_VERSION_EX_RES "
"id %d prots 0x%x ver %d.%d\n",
ver->FirmwareId,
ver->SupportedProtocols,
ver->RomVersionMajor,
ver->RomVersionMinor);
ver->TextLabel[33] = 0x0;
printk("fw version is %s\n",ver->TextLabel);
coredev->mode = ver->FirmwareId == 255 ? DEVICE_MODE_NONE : ver->FirmwareId;
coredev->modes_supported = ver->SupportedProtocols;
@ -1764,8 +1777,9 @@ int smscore_gpio_get_level(struct smscore_device_t *coredev, u8 PinNum,
return rc;
}
//zyc
static request_cmmb_gpio(void)
static void request_cmmb_gpio(void)
{
int ret;
ret = gpio_request(CMMB_1186_POWER_RESET, NULL);
@ -1790,6 +1804,16 @@ static request_cmmb_gpio(void)
}
static void release_cmmb_gpio(void)
{
gpio_free(CMMB_1186_POWER_RESET);
gpio_free(CMMB_1186_POWER_DOWN);
gpio_free(CMMB_1186_POWER_ENABLE);
printk("leave the release_cmmb_gpio\n");
}
static int __init smscore_module_init(void)
{
int rc = 0;
@ -1804,8 +1828,9 @@ static int __init smscore_module_init(void)
kmutex_init(&g_smscore_registrylock);
//request the gpio used by cmmb
request_cmmb_gpio();
//request_cmmb_gpio();
/* Register sub system adapter objects */
request_cmmb_gpio();
#ifdef SMS_NET_SUBSYS
/* NET Register */
@ -1856,7 +1881,6 @@ static int __init smscore_module_init(void)
#ifdef SMS_SPI_ROCKCHIP
sms_debug(KERN_INFO "smsspi_register\n");
rc = smsspi_register();
if (rc) {
@ -1891,6 +1915,9 @@ static int __init smscore_module_init(void)
static void __exit smscore_module_exit(void)
{
#ifdef SMS_NET_SUBSYS
/* Net Unregister */
smsnet_unregister();
@ -1943,6 +1970,8 @@ static void __exit smscore_module_exit(void)
kfree(entry);
}
kmutex_unlock(&g_smscore_registrylock);
release_cmmb_gpio();
sms_debug("");
}

9
drivers/cmmb/siano/smscoreapi.h
View File

@ -39,6 +39,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#include "dvb_frontend.h"
#endif
#define SIANO_HALFDUPLEX 1
#define kmutex_init(_p_) mutex_init(_p_)
#define kmutex_lock(_p_) mutex_lock(_p_)
#define kmutex_trylock(_p_) mutex_trylock(_p_)
@ -200,6 +202,10 @@ struct smsclient_params_t {
#define MSG_SMS_LOOPBACK_REQ 718
#define MSG_SMS_LOOPBACK_RES 719
#if SIANO_HALFDUPLEX
#define MSG_SMS_SPI_HALFDUPLEX_TOKEN_HOST_TO_DEVICE 518 //, // SPI Half-Duplex protocol
#define MSG_SMS_SPI_HALFDUPLEX_TOKEN_DEVICE_TO_HOST 519 //, //
#endif
#define SMS_INIT_MSG_EX(ptr, type, src, dst, len) do { \
(ptr)->msgType = type; (ptr)->msgSrcId = src; (ptr)->msgDstId = dst; \
@ -536,8 +542,7 @@ extern int sms_debug;
#define sms_info(fmt, arg...) \
dprintk(KERN_INFO, DBG_INFO, fmt, ##arg)
#define sms_debug(fmt, arg...) \
dprintk(KERN_INFO, DBG_INFO, fmt, ##arg)//
dprintk(KERN_INFO, DBG_INFO, fmt, ##arg)
//define the gpio used
#define CMMB_1186_SPIIRQ RK2818_PIN_PA6 //This Pin is SDK Board GPIOPortA_Pin6

18
drivers/cmmb/siano/smsspicommon.c
View File

@ -326,6 +326,23 @@ void smsspi_common_transfer_msg(struct _spi_dev *dev, struct _spi_msg *txmsg,
char *txbuf;
struct _rx_buffer_st *buf, *tmp_buf;
#if SIANO_HALFDUPLEX
if (txmsg){
tx_bytes = txmsg->len;
if (padding_allowed)
bytes_to_transfer =
(((tx_bytes + SPI_PACKET_SIZE -
1) >> SPI_PACKET_SIZE_BITS) <<
SPI_PACKET_SIZE_BITS);
else
bytes_to_transfer = (((tx_bytes + 3) >> 2) << 2);
txbuf = txmsg->buf;
tx_phy_addr = txmsg->buf_phy_addr;
len = min(bytes_to_transfer, RX_PACKET_SIZE);
dev->cb.transfer_data_cb(dev->phy_context,(unsigned char *)txbuf,tx_phy_addr,NULL,NULL,len);
} else
#endif
{
len = 0;
if (!dev->cb.transfer_data_cb) {
sms_err("function called while module is not initialized.\n");
@ -419,6 +436,7 @@ void smsspi_common_transfer_msg(struct _spi_dev *dev, struct _spi_msg *txmsg,
dev->cb.free_rx_buf(dev->context, buf);
}
}
int smsspicommon_init(struct _spi_dev *dev, void *context, void *phy_context,
struct _spi_dev_cb_st *cb)

305
drivers/cmmb/siano/smsspilog.c
View File

@ -40,6 +40,9 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#include "smsspicommon.h"
#include "smsspiphy.h"
#include <linux/spi/spi.h>
#if SIANO_HALFDUPLEX
#include <linux/kthread.h>//hzb@20100902
#endif
#define ANDROID_2_6_25
#ifdef ANDROID_2_6_25
@ -51,9 +54,13 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#define SMS_INTR_PIN 19 /* 0 for nova sip, 26 for vega in the default, 19 in the reality */
#define TX_BUFFER_SIZE 0x200
#if 0
#define RX_BUFFER_SIZE (0x1000 + SPI_PACKET_SIZE + 0x100)
#define NUM_RX_BUFFERS 64 // change to 128
//#define NUM_RX_BUFFERS 72
#define NUM_RX_BUFFERS 64 // change to 128
#else
#define RX_BUFFER_SIZE (0x10000 + SPI_PACKET_SIZE + 0x100)
#define NUM_RX_BUFFERS 4 // change to 128
#endif
u32 g_Sms_Int_Counter=0;
@ -95,8 +102,20 @@ static int spi_resume_fail = 0 ;
static int spi_suspended = 0 ;
static void spi_worker_thread(void *arg);
#if SIANO_HALFDUPLEX
int g_IsTokenOwned=false;
int g_IsTokenEnable=false;
struct semaphore HalfDuplexSemaphore;
struct task_struct *SPI_Thread;
static int SPI_Thread_IsStop=0;
#define MSG_HDR_FLAG_STATIC_MSG 0x0001 // Message is dynamic when this bit is '0'
#else
static DECLARE_WORK(spi_work_queue, (void *)spi_worker_thread);
#endif
static u8 smsspi_preamble[] = { 0xa5, 0x5a, 0xe7, 0x7e };
// to support dma 16byte burst size
@ -131,8 +150,164 @@ static void spi_worker_thread(void *arg)
struct _spi_msg txmsg;
int i=0;
#if SIANO_HALFDUPLEX
static u8 s_SpiTokenMsgBuf[256] = {0};
const u8 g_PreambleBytes[4] = { 0xa5, 0x5a, 0xe7, 0x7e};
struct SmsMsgHdr_ST s_SpiTokenSendMsg = {MSG_SMS_SPI_HALFDUPLEX_TOKEN_HOST_TO_DEVICE, 0, 11, sizeof(struct SmsMsgHdr_ST), MSG_HDR_FLAG_STATIC_MSG};
memcpy( s_SpiTokenMsgBuf, g_PreambleBytes, sizeof(g_PreambleBytes) );
memcpy( &s_SpiTokenMsgBuf[sizeof(g_PreambleBytes)], &s_SpiTokenSendMsg, sizeof(s_SpiTokenSendMsg) );
PDEBUG("worker start\n");
do {
mdelay(3);
if (g_IsTokenEnable){
if (g_IsTokenOwned){
if (!msg && !list_empty(&spi_device->txqueue))
msg = (struct _smsspi_txmsg *)list_entry(spi_device->txqueue.next, struct _smsspi_txmsg, node);
if (!msg) {
// TX queue empty - give up token
sms_debug("TX queue empty - give up token\n");
g_IsTokenOwned = false;
txmsg.len = 256;
txmsg.buf = s_SpiTokenMsgBuf;
txmsg.buf_phy_addr = 0;//zzf spi_device->txbuf_phy_addr;
smsspi_common_transfer_msg(&spi_device->dev,&txmsg, 0);
} else {
sms_debug("msg is not null\n");
if (msg->add_preamble) {// need to add preamble
txmsg.len = min(msg->size + sizeof(smsspi_preamble),(size_t) TX_BUFFER_SIZE);
txmsg.buf = spi_device->txbuf;
txmsg.buf_phy_addr = spi_device->txbuf_phy_addr;
memcpy(txmsg.buf, smsspi_preamble, sizeof(smsspi_preamble));
memcpy(&txmsg.buf[sizeof(smsspi_preamble)],msg->buffer,txmsg.len - sizeof(smsspi_preamble));
msg->add_preamble = 0;
msg->buffer = (char*)msg->buffer + txmsg.len - sizeof(smsspi_preamble);
msg->size -= txmsg.len - sizeof(smsspi_preamble);
/* zero out the rest of aligned buffer */
memset(&txmsg.buf[txmsg.len], 0, TX_BUFFER_SIZE - txmsg.len);
if(spi_resume_fail||spi_suspended)
{
sms_err(KERN_EMERG " SMS1180: spi failed\n");
} else {
smsspi_common_transfer_msg(&spi_device->dev, &txmsg, 1);
}
} else {// donot need to add preamble
txmsg.len = min(msg->size, (size_t) TX_BUFFER_SIZE);
txmsg.buf = spi_device->txbuf;
txmsg.buf_phy_addr = spi_device->txbuf_phy_addr;
memcpy(txmsg.buf, msg->buffer, txmsg.len);
msg->buffer = (char*)msg->buffer + txmsg.len;
msg->size -= txmsg.len;
/* zero out the rest of aligned buffer */
memset(&txmsg.buf[txmsg.len], 0, TX_BUFFER_SIZE - txmsg.len);
if(spi_resume_fail||spi_suspended){
sms_err(KERN_EMERG " SMS1180: spi failed\n");
} else {
smsspi_common_transfer_msg(&spi_device->dev,&txmsg, 0);
}
}
}
} else {
if(0)//spi_resume_fail||spi_suspended)
{
sms_err(KERN_EMERG " SMS1180: spi failed\n") ;
} else {
sms_debug(KERN_EMERG "[SMS]spi_worker_thread token enable wait HalfDuplexSemaphore\n") ;
if (SPI_Thread_IsStop)
return -EINTR;
if (down_interruptible(&HalfDuplexSemaphore))
return -EINTR;
sms_debug(KERN_EMERG "[SMS]spi_worker_thread token enable get HalfDuplexSemaphore\n") ;
smsspi_common_transfer_msg(&spi_device->dev, NULL, 1);
}
}
}else {
sms_debug(KERN_EMERG "[SMS]spi_worker_thread token disable wait HalfDuplexSemaphore\n") ;
if (SPI_Thread_IsStop)
return -EINTR;
if (down_interruptible(&HalfDuplexSemaphore))
return -EINTR;
sms_debug(KERN_EMERG "[SMS]spi_worker_thread token disable get HalfDuplexSemaphore\n") ;
if (!msg && !list_empty(&spi_device->txqueue))
msg = (struct _smsspi_txmsg *)list_entry(spi_device->txqueue.next, struct _smsspi_txmsg, node);
if (msg) {
if (msg->add_preamble) {// need to add preamble
txmsg.len = min(msg->size + sizeof(smsspi_preamble),(size_t) TX_BUFFER_SIZE);
txmsg.buf = spi_device->txbuf;
txmsg.buf_phy_addr = spi_device->txbuf_phy_addr;
memcpy(txmsg.buf, smsspi_preamble, sizeof(smsspi_preamble));
memcpy(&txmsg.buf[sizeof(smsspi_preamble)],msg->buffer,txmsg.len - sizeof(smsspi_preamble));
msg->add_preamble = 0;
msg->buffer = (char*)msg->buffer + txmsg.len - sizeof(smsspi_preamble);
msg->size -= txmsg.len - sizeof(smsspi_preamble);
/* zero out the rest of aligned buffer */
memset(&txmsg.buf[txmsg.len], 0, TX_BUFFER_SIZE - txmsg.len);
if(spi_resume_fail||spi_suspended)
{
sms_err(KERN_EMERG " SMS1180: spi failed\n");
} else {
smsspi_common_transfer_msg(&spi_device->dev, &txmsg, 1);
}
} else {// donot need to add preamble
txmsg.len = min(msg->size, (size_t) TX_BUFFER_SIZE);
txmsg.buf = spi_device->txbuf;
txmsg.buf_phy_addr = spi_device->txbuf_phy_addr;
memcpy(txmsg.buf, msg->buffer, txmsg.len);
msg->buffer = (char*)msg->buffer + txmsg.len;
msg->size -= txmsg.len;
/* zero out the rest of aligned buffer */
memset(&txmsg.buf[txmsg.len], 0, TX_BUFFER_SIZE - txmsg.len);
if(spi_resume_fail||spi_suspended)
{
sms_err(KERN_EMERG " SMS1180: spi failed\n");
} else {
smsspi_common_transfer_msg(&spi_device->dev,&txmsg, 0);
}
}
} else {
if(0)//spi_resume_fail||spi_suspended)
{
sms_err(KERN_EMERG " SMS1180: spi failed\n") ;
} else {
smsspi_common_transfer_msg(&spi_device->dev, NULL, 1);
}
}
}
/* if there was write, have we finished ? */
if (msg && !msg->size) {
/* call postwrite call back */
if (msg->postwrite)
msg->postwrite(spi_device);
list_del(&msg->node);
complete(&msg->completion);
msg = NULL;
}
/* if there was read, did we read anything ? */
//check if we lost msg, if so, recover
if(g_Sms_MsgFound_Counter < g_Sms_Int_Counter){
sms_err("we lost msg, probably becouse dma time out\n");
//for(i=0; i<16; i++)
{
//smsspi_common_transfer_msg(&spi_device->dev, NULL, 1);
}
g_Sms_MsgFound_Counter = g_Sms_Int_Counter;
}
}while(1);
#else
PDEBUG("worker start\n");
do{
mdelay(6);
/* do we have a msg to write ? */
if (!msg && !list_empty(&spi_device->txqueue))
msg = (struct _smsspi_txmsg *)list_entry(spi_device->txqueue.next, struct _smsspi_txmsg, node);
@ -150,7 +325,7 @@ static void spi_worker_thread(void *arg)
memset(&txmsg.buf[txmsg.len], 0, TX_BUFFER_SIZE - txmsg.len);
if(spi_resume_fail||spi_suspended)
{
printk(KERN_EMERG " SMS1180: spi failed\n");
sms_err(KERN_EMERG " SMS1180: spi failed\n");
} else {
smsspi_common_transfer_msg(&spi_device->dev, &txmsg, 1);
}
@ -166,7 +341,7 @@ static void spi_worker_thread(void *arg)
memset(&txmsg.buf[txmsg.len], 0, TX_BUFFER_SIZE - txmsg.len);
if(spi_resume_fail||spi_suspended)
{
printk(KERN_EMERG " SMS1180: spi failed\n");
sms_err(KERN_EMERG " SMS1180: spi failed\n");
} else {
smsspi_common_transfer_msg(&spi_device->dev,&txmsg, 0);
}
@ -174,7 +349,7 @@ static void spi_worker_thread(void *arg)
} else {
if(spi_resume_fail||spi_suspended)
{
printk(KERN_EMERG " SMS1180: spi failed\n") ;
sms_err(KERN_EMERG " SMS1180: spi failed\n") ;
} else {
smsspi_common_transfer_msg(&spi_device->dev, NULL, 1);
}
@ -196,7 +371,7 @@ static void spi_worker_thread(void *arg)
//check if we lost msg, if so, recover
if(g_Sms_MsgFound_Counter < g_Sms_Int_Counter)
{
printk("we lost msg, probably becouse dma time out\n");
sms_err("we lost msg, probably becouse dma time out\n");
//for(i=0; i<16; i++)
{
//smsspi_common_transfer_msg(&spi_device->dev, NULL, 1);
@ -204,7 +379,7 @@ static void spi_worker_thread(void *arg)
g_Sms_MsgFound_Counter = g_Sms_Int_Counter;
}
} while (!list_empty(&spi_device->txqueue) || msg);
#endif
}
unsigned long u_msgres_count =0;
@ -218,13 +393,14 @@ static void msg_found(void *context, void *buf, int offset, int len)
g_Sms_MsgFound_Counter++;
u_msgres_count ++;
//sms_debug("Msg_found count = %d\n", u_msgres_count);
sms_debug("Msg_found count = %d\n", u_msgres_count);
//printk("Msg_found count = %d\n", u_msgres_count);
if(len > RX_BUFFER_SIZE || offset >RX_BUFFER_SIZE )
{
printk("SMS1180: msg rx over,len=0x%x,offset=0x%x\n",len,offset ) ;
printk("SMS1180: cb->p = [0x%x]\n",(unsigned int) cb->p) ;
printk("SMS1180: cb->phys=[0x%x]\n",(unsigned int) cb->phys) ;
sms_debug("SMS1180: msg rx over,len=0x%x,offset=0x%x\n",len,offset ) ;
sms_debug("SMS1180: cb->p = [0x%x]\n",(unsigned int) cb->p) ;
sms_debug("SMS1180: cb->phys=[0x%x]\n",(unsigned int) cb->phys) ;
}
cb->offset = offset;
@ -241,10 +417,15 @@ static void smsspi_int_handler(void *context)
if(spi_resume_fail||spi_suspended)
{
printk(KERN_EMERG " SMS1180: spi failed\n") ;
sms_err(KERN_EMERG " SMS1180: spi failed\n") ;
return ;
}
}
#if SIANO_HALFDUPLEX
up(&HalfDuplexSemaphore);
sms_debug(KERN_EMERG "[SMS]smsspi_int_handler send HalfDuplexSemaphore@intr\n") ;
#else
schedule_work(&spi_work_queue);
#endif
}
@ -254,7 +435,16 @@ static int smsspi_queue_message_and_wait(struct _spi_device_st *spi_device,
{
init_completion(&msg->completion);
list_add_tail(&msg->node, &spi_device->txqueue);
#if SIANO_HALFDUPLEX
if(!g_IsTokenEnable){
sms_debug(KERN_EMERG "[SMS]smsspi_queue_message_and_wait token disable send HalfDuplexSemaphore@writemsg\n") ;
up(&HalfDuplexSemaphore);
} else {
sms_debug(KERN_EMERG "[SMS]smsspi_queue_message_and_wait send HalfDuplexSemaphore\n") ;
}
#else
schedule_work(&spi_work_queue);
#endif
wait_for_completion(&msg->completion);
return 0;
}
@ -269,12 +459,12 @@ static int smsspi_SetIntLine(void *context)
{
MSG_SMS_SPI_INT_LINE_SET_REQ, 0, HIF_TASK,
sizeof(struct _Msg), 0}, {
0, intr_pin, 100}
0, intr_pin, 1000}
};
struct _smsspi_txmsg msg;
PDEBUG("Sending SPI Set Interrupt command sequence\n");
sms_info("Sending SPI Set Interrupt command sequence\n");
msg.buffer = &Msg;
msg.size = sizeof(Msg);
msg.alignment = SPI_PACKET_SIZE;
@ -306,7 +496,6 @@ static int smsspi_preload(void *context)
printk(KERN_EMERG "smsmdtv: call smsspi_queue_message_and_wait\n") ;
smsspi_queue_message_and_wait(context, &msg);
ret = smsspi_SetIntLine(context);
sms_info("smsspi_preload set int line ret = 0x%x",ret);
//return ret;
@ -336,12 +525,10 @@ static int smsspi_postload(void *context)
msg.buffer = &Msg;
msg.size = sizeof(Msg);
msg.alignment = SPI_PACKET_SIZE;
msg.add_preamble = 0;
msg.add_preamble = 1;
msg.prewrite = NULL;
msg.postwrite = NULL; /* smsspiphy_restore_clock; */
//smsspi_queue_message_and_wait(context, &msg);
msleep(50);
g_Sms_Int_Counter=0;
g_Sms_Int_Counter=0;
@ -455,7 +642,7 @@ void smsspi_poweron(void)
ret = smsspibus_ssp_resume(spi_dev->phy_dev) ;
if( ret== -1)
{
printk(KERN_INFO "smsspibus_ssp_resume failed\n") ;
sms_err(KERN_INFO "smsspibus_ssp_resume failed\n") ;
}
}
@ -482,22 +669,17 @@ static int siano1186_probe( struct spi_device *Smsdevice)
kmalloc(sizeof(struct _spi_device_st), GFP_KERNEL);
if(!spi_device)
{
printk("spi_device is null smsspi_register\n") ;
sms_err("spi_device is null smsspi_register\n") ;
return 0;
}
spi_dev = spi_device;
INIT_LIST_HEAD(&spi_device->txqueue);
#if 0
spi_device->txbuf = kmalloc(max(TX_BUFFER_SIZE,PAGE_SIZE),GFP_KERNEL|GFP_DMA);
spi_device->txbuf_phy_addr = __pa(spi_device->txbuf);
#else
spi_device->txbuf = dma_alloc_coherent(NULL, max(TX_BUFFER_SIZE,PAGE_SIZE),&spi_device->txbuf_phy_addr, GFP_KERNEL | GFP_DMA);
#endif
if (!spi_device->txbuf) {
printk(KERN_INFO "%s dma_alloc_coherent(...) failed\n", __func__);
sms_err(KERN_INFO "%s dma_alloc_coherent(...) failed\n", __func__);
ret = -ENOMEM;
goto txbuf_error;
}
@ -508,7 +690,7 @@ static int siano1186_probe( struct spi_device *Smsdevice)
spi_device->phy_dev = smsspiphy_init(Smsdevice, smsspi_int_handler, spi_device);
if (spi_device->phy_dev == 0) {
printk(KERN_INFO "%s smsspiphy_init(...) failed\n", __func__);
sms_err(KERN_INFO "%s smsspiphy_init(...) failed\n", __func__);
goto phy_error;
}
@ -519,7 +701,7 @@ static int siano1186_probe( struct spi_device *Smsdevice)
ret = smsspicommon_init(&spi_device->dev, spi_device, spi_device->phy_dev, &common_cb);
if (ret) {
printk(KERN_INFO "%s smsspiphy_init(...) failed\n", __func__);
sms_err(KERN_INFO "%s smsspiphy_init(...) failed\n", __func__);
goto common_error;
}
@ -545,20 +727,29 @@ static int siano1186_probe( struct spi_device *Smsdevice)
params.postload_handler = smsspi_postload;
}
#if SIANO_HALFDUPLEX
g_IsTokenOwned = false;
init_MUTEX_LOCKED(&HalfDuplexSemaphore);
SPI_Thread = kthread_run(spi_worker_thread,NULL,"cmmb_spi_thread");
SPI_Thread_IsStop = 0;
#endif
ret = smscore_register_device(&params, &spi_device->coredev);
if (ret < 0) {
printk(KERN_INFO "%s smscore_register_device(...) failed\n", __func__);
sms_err(KERN_INFO "%s smscore_register_device(...) failed\n", __func__);
goto reg_device_error;
}
ret = smscore_start_device(spi_device->coredev);
if (ret < 0) {
printk(KERN_INFO "%s smscore_start_device(...) failed\n", __func__);
sms_err(KERN_INFO "%s smscore_start_device(...) failed\n", __func__);
goto start_device_error;
}
spi_resume_fail = 0 ;
spi_suspended = 0 ;
printk(KERN_INFO "siano1186_probe exiting\n") ;
sms_info(KERN_INFO "siano1186_probe exiting\n") ;
PDEBUG("exiting\n");
return 0;
@ -578,14 +769,39 @@ static int siano1186_probe( struct spi_device *Smsdevice)
#else
dma_free_coherent(NULL, TX_BUFFER_SIZE, spi_device->txbuf,spi_device->txbuf_phy_addr);
#endif
txbuf_error:
kfree(spi_device);
sms_err("exiting error %d\n", ret);
return ret;
}
void smsspi_remove(void)
{
struct _spi_device_st *spi_device = spi_dev;
sms_info(KERN_INFO "smsmdtv: in smsspi_unregister\n") ;
int ret;
#if SIANO_HALFDUPLEX
SPI_Thread_IsStop = 1;
up(&HalfDuplexSemaphore);
sms_info("stop kthread \n");
ret = kthread_stop(SPI_Thread);
sms_info("stop kthread ret = 0x%x\n",ret);
#endif
/* stop interrupts */
smsspiphy_deinit(spi_device->phy_dev);
smscore_unregister_device(spi_device->coredev);
dma_free_coherent(NULL, TX_BUFFER_SIZE, spi_device->txbuf,spi_device->txbuf_phy_addr);
kfree(spi_device);
sms_info("smsspi_remove exiting\n");
}
static struct spi_driver siano1186_driver = {
.driver = {
.name = DRV_NAME,
@ -593,33 +809,16 @@ static struct spi_driver siano1186_driver = {
.owner = THIS_MODULE,
},
.probe = siano1186_probe,
//.remove = __devexit_p(siano1186_remove),
.remove = __devexit_p(smsspi_remove),
};
int smsspi_register(void)
{
printk(KERN_INFO "smsmdtv: in smsspi_register\n") ;
sms_info(KERN_INFO "smsmdtv: in smsspi_register\n") ;
spi_register_driver(&siano1186_driver);
}
void smsspi_unregister(void)
{
struct _spi_device_st *spi_device = spi_dev;
printk(KERN_INFO "smsmdtv: in smsspi_unregister\n") ;
PDEBUG("entering\n");
/* stop interrupts */
smsspiphy_deinit(spi_device->phy_dev);
smscore_unregister_device(spi_device->coredev);
#if 0 //spi buff kmalloc
kfree(spi_device->txbuf);
#else
dma_free_coherent(NULL, TX_BUFFER_SIZE, spi_device->txbuf,spi_device->txbuf_phy_addr);
#endif
PDEBUG("exiting\n");
spi_unregister_driver(&siano1186_driver);
}

324
drivers/cmmb/siano/smsspiphy_rk.c
View File

@ -39,91 +39,24 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#include <linux/spi/spi.h>
#include <mach/gpio.h>
#include "smscoreapi.h"
#include <linux/notifier.h>
#include <mach/iomux.h>
#define SSP_PORT 1
#define SSP_CKEN CKEN_SSP1
#define SMS_IRQ_GPIO MFP_PIN_GPIO5
#if (SSP_PORT == 1)
#define SDCMR_RX DRCMRRXSSDR
#define SDCMR_TX DRCMRTXSSDR
#else
#if (SSP_PORT == 2)
#define SDCMR_RX DRCMR15
#define SDCMR_TX DRCMR16
#else
#if (SSP_PORT == 3)
#define SDCMR_RX DRCMR66
#define SDCMR_TX DRCMR67
#else
#if (SSP_PORT == 4)
#define SDCMR_RX DRCMRRXSADR
#define SDCMR_TX DRCMRTXSADR
#endif
#endif
#endif
#endif
//#define CMMB_1186_SPIIRQ RK2818_PIN_PE1 //This Pin is SDK Board GPIOPortE_Pin1
//#define CMMB_1186_PWR_EN GPIOPortH_Pin7//This Pin is SDK Board GPIOPortE_Pin1
/* Macros defining physical layer behaviour*/
#ifdef PXA_310_LV
#define CLOCK_FACTOR 1
//#define CLOCK_FACTOR 2
#else /*PXA_310_LV */
#define CLOCK_FACTOR 2
#endif /*PXA_310_LV */
/* Macros for coding reuse */
/*! macro to align the divider to the proper offset in the register bits */
#define CLOCK_DIVIDER(i)((i-1)<<8) /* 1-4096 */
/*! DMA related macros */
#define DMA_INT_MASK (DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERR)
#define RESET_DMA_CHANNEL (DCSR_NODESC | DMA_INT_MASK)
#define SSP_TIMEOUT_SCALE (769)
#define SSP_TIMEOUT(x) ((x*10000)/SSP_TIMEOUT_SCALE)
#define SPI_PACKET_SIZE 256
// in android platform 2.6.25 , need to check the Reg bit by bit later
#define GSDR(x) __REG2(0x40e00400, ((x) & 0x60) >> 3)
#define GCDR(x) __REG2(0x40300420, ((x) & 0x60) >> 3)
#define GSRER(x) __REG2(0x40e00440, ((x) & 0x60) >> 3)
#define GCRER(x) __REG2(0x40e00460, ((x) & 0x60) >> 3)
#define GPIO_DIR_IN 0
#define SSCR0_P1 __REG(0x41000000) /* SSP Port 1 Control Register 0 */
#define SSCR1_P1 __REG(0x41000004) /* SSP Port 1 Control Register 1 */
#define SSSR_P1 __REG(0x41000008) /* SSP Port 1 Status Register */
#define SSITR_P1 __REG(0x4100000C) /* SSP Port 1 Interrupt Test Register */
#define SSDR_P1 __REG(0x41000010) /* (Write / Read) SSP Port 1 Data Write Register/SSP Data Read Register */
unsigned long u_irq_count =0;
/**********************************************************************/
//to support dma 16byte burst size
// change SPI TS according to marvel recomendations
#define DMA_BURST_SIZE DCMD_BURST16 //DCMD_BURST8
#define SPI_RX_FIFO_RFT SSCR1_RxTresh(4) //SSCR1_RxTresh(1)
#define SPI_TX_FIFO_TFT SSCR1_TxTresh(3) //SSCR1_TxTresh(1)
/**********************************************************************/
#include <linux/notifier.h>
static unsigned int dma_rxbuf_phy_addr ;
static unsigned int dma_txbuf_phy_addr ;
@ -149,25 +82,8 @@ static int sms_panic_handler(struct notifier_block *this,
{
smscore_panic_print() ;
spilog_panic_print() ;
printk("last tx_len = %d\n",tx_len) ;
printk("last DMA len = %d\n",dma_len) ;
#if 0
printk("rxbuf_addr=[0x%x],Rx DSADR=[0x%x] DTADR=[0x%x] DCSR=[0x%x] DCMD=[0x%x]\n",
dma_rxbuf_phy_addr, DSADR(rx_dma_channel),DTADR(rx_dma_channel),
DCSR(rx_dma_channel),DCMD(rx_dma_channel) );
printk("txbuf_addr=[0x%x],Tx DSADR=[0x%x] DTADR=[0x%x] DCSR[0x%x] DCMD=[0x%x]\n",
dma_txbuf_phy_addr, DSADR(tx_dma_channel),DTADR(tx_dma_channel),
DCSR(tx_dma_channel),DCMD(tx_dma_channel) );
if(panic_sspdev)
{
printk("SSCR0 =[0x%x]\n",__raw_readl(panic_sspdev->ssp->mmio_base + SSCR0)) ;
printk("SSCR1 =[0x%x]\n",__raw_readl(panic_sspdev->ssp->mmio_base + SSCR1)) ;
printk("SSTO =[0x%x]\n",__raw_readl(panic_sspdev->ssp->mmio_base + SSTO)) ;
printk("SSPSP =[0x%x]\n",__raw_readl(panic_sspdev->ssp->mmio_base + SSPSP)) ;
printk("SSSR =[0x%x]\n",__raw_readl(panic_sspdev->ssp->mmio_base + SSSR)) ;
}
#endif
sms_debug("last tx_len = %d\n",tx_len) ;
sms_debug("last DMA len = %d\n",dma_len) ;
panic_event_handled =1 ;
}
@ -189,37 +105,14 @@ static struct notifier_block sms_panic_notifier = {
void pxa3xx_gpio_set_rising_edge_detect (int gpio_id, int dir)
{
#if 0
unsigned long flags;
int gpio = mfp_to_gpio(gpio_id);
// if (gpio >= GPIO_EXP_START)
// {
// return 0;
// }
// spin_lock_irqsave(&gpio_spin_lock, flags);
local_irq_save(flags);
if ( dir == GPIO_DIR_IN)
GCRER(gpio) =1u << (gpio& 0x1f);
else
GSRER(gpio) =1u << (gpio& 0x1f);
local_irq_restore(flags);
;
#endif
}
void pxa3xx_gpio_set_direction(int gpio_id , int dir)
{
#if 0
unsigned long flags;
int gpio = mfp_to_gpio(gpio_id);
local_irq_save(flags);
if ( dir == GPIO_DIR_IN)
GCDR(gpio) =1u << (gpio& 0x1f);
else
GSDR(gpio) =1u << (gpio& 0x1f);
local_irq_restore(flags);
;
#endif
}
//////////////////////////////////////////////////////////
@ -283,18 +176,19 @@ static int invert_endianness(char *buf, int len)
static unsigned long dma_map_buf(struct spiphy_dev_s *spiphy_dev, char *buf,
int len, int direction)
{
unsigned long phyaddr;
/* map dma buffers */
unsigned long phyaddr; /* map dma buffers */
if (!buf) {
PERROR(" NULL buffers to map\n");
return 0;
}
/* map buffer */
/*
phyaddr = dma_map_single(spiphy_dev->dev, buf, len, direction);
//if (dma_mapping_error(phyaddr)) {
// PERROR("exiting with error\n");
// return 0;
// }
if (dma_mapping_error(phyaddr)) {
PERROR("exiting with error\n");
return 0;
}
*/
return phyaddr;
}
@ -305,7 +199,7 @@ static irqreturn_t spibus_interrupt(int irq, void *context)
u_irq_count ++;
// PDEBUG("INT counter = %d\n", u_irq_count);
//printk("cmmb siano 1186 int\n");
printk("cmmb siano 1186 int\n");
sms_info("spibus_interrupt %d\n", u_irq_count);
if (spiphy_dev->interruptHandler)
@ -328,19 +222,7 @@ static irqreturn_t spibus_interrupt(int irq, void *context)
static void spibus_dma_handler(int channel, void *context)
{
#if 0
struct spiphy_dev_s *spiphy_dev = (struct spiphy_dev_s *) context;
u32 irq_status = DCSR(channel) & DMA_INT_MASK;
// printk( "recieved interrupt from dma channel %d irq status %x.\n",
// channel, irq_status);
if (irq_status & DCSR_BUSERR) {
printk(KERN_EMERG "bus error!!! resetting channel %d\n", channel);
DCSR(spiphy_dev->rx_dma_channel) = RESET_DMA_CHANNEL;
DCSR(spiphy_dev->tx_dma_channel) = RESET_DMA_CHANNEL;
}
DCSR(spiphy_dev->rx_dma_channel) = RESET_DMA_CHANNEL;
complete(&spiphy_dev->transfer_in_process);
#endif
}
@ -352,26 +234,28 @@ void smsspibus_xfer(void *context, unsigned char *txbuf,
unsigned char *temp = NULL;
int ret;
//sms_debug(KERN_INFO "smsspibus_xfer \n");
#if SIANO_HALFDUPLEX
if(txbuf)
{
//sms_debug("tx_buf:%x,%x,%x,%x,%x,%x", txbuf[0], txbuf[1], txbuf[2], txbuf[3], txbuf[4],txbuf[5]);
ret = spi_write(spiphy_dev->Smsdevice, txbuf, len);
} else {
if ((rxbuf)&&(len != 16))
ret = spi_read(spiphy_dev->Smsdevice, rxbuf, len);
}
#else
if(txbuf)
{
// sms_debug("tx_buf:%x,%x,%x,%x,%x,%x", txbuf[0], txbuf[1], txbuf[2], txbuf[3], txbuf[4],txbuf[5]);
//sms_debug("tx_buf:%x,%x,%x,%x,%x,%x", txbuf[0], txbuf[1], txbuf[2], txbuf[3], txbuf[4],txbuf[5]);
ret = spi_write(spiphy_dev->Smsdevice, txbuf, len);
}
//if (ret)
// sms_err(KERN_INFO "smsspibus_xfer spi write ret=0x%x\n",ret);
//memset (rxbuf, 0xff, 256);
if ((rxbuf)&&(len != 16))
ret = spi_read(spiphy_dev->Smsdevice, rxbuf, len);
// sms_debug("rxbuf 4, 5,6,7,8,9=%x,%x,%x,%x,%x,%x\n",rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],rxbuf[8],rxbuf[9]);
//sms_debug("sms spi read buf=0x%x\n",rxbuf[5]);
#endif
//sms_debug("rxbuf 4, 5,8,9=%x,%x,%x,%x\n",rxbuf[4],rxbuf[5],rxbuf[8],rxbuf[9]);
//printk("len=%x,rxbuf 4, 5,8,9Mlen=%x,%x,%x,%x,%x,%x\n",len,rxbuf[4],rxbuf[5],rxbuf[8],rxbuf[9],rxbuf[13],rxbuf[12]);
}
@ -384,28 +268,19 @@ static struct ssp_state sms_ssp_state ;
void smsspibus_ssp_suspend(void* context )
{
struct spiphy_dev_s *spiphy_dev ;
printk("entering smsspibus_ssp_suspend\n");
if(!context)
{
PERROR("smsspibus_ssp_suspend context NULL \n") ;
return ;
}
spiphy_dev = (struct spiphy_dev_s *) context;
struct spiphy_dev_s *spiphy_dev ;
//ssp_flush(&(spiphy_dev->sspdev)) ;
//ssp_save_state(&(spiphy_dev->sspdev) , &sms_ssp_state) ;
//ssp_disable(&(spiphy_dev->sspdev));
//ssp_exit(&spiphy_dev->sspdev);
free_irq(gpio_to_irq(CMMB_1186_SPIIRQ), spiphy_dev);
//zyc
gpio_direction_output(CMMB_1186_SPIIRQ,0);
/* release DMA resources */
//if (spiphy_dev->rx_dma_channel >= 0)
//pxa_free_dma(spiphy_dev->rx_dma_channel);
sms_info("entering smsspibus_ssp_suspend\n");
if(!context)
{
sms_info("smsspibus_ssp_suspend context NULL \n") ;
return ;
}
spiphy_dev = (struct spiphy_dev_s *) context;
// free_irq(gpio_to_irq(CMMB_1186_SPIIRQ), NULL);
//if (spiphy_dev->tx_dma_channel >= 0)
//pxa_free_dma(spiphy_dev->tx_dma_channel);
chip_powerdown();
}
@ -436,6 +311,7 @@ static void chip_poweron()
gpio_direction_output(CMMB_1186_POWER_RESET,0);
gpio_direction_output(CMMB_1186_POWER_DOWN,0);
// GPIOSetPinDirection(CMMB_1186_POWER_ENABLE,1);
gpio_direction_output(CMMB_1186_POWER_ENABLE,0);
mdelay(100);
gpio_direction_output(CMMB_1186_POWER_ENABLE,1);
@ -447,7 +323,6 @@ static void chip_poweron()
mdelay(200);
printk("cmmb chip_poweron !!!!\n");
}
static void chip_powerdown()
@ -472,7 +347,9 @@ static void chip_powerdown()
//1186 cmmb power down
#if 1
// GPIOSetPinDirection(CMMB_1186_POWER_ENABLE,1);
gpio_direction_output(CMMB_1186_POWER_ENABLE,0);
mdelay(300);
//set the CS0 as gpio mode
// rk2818_mux_api_set(GPIOB4_SPI0CS0_MMC0D4_NAME,0);
@ -498,14 +375,11 @@ int smsspibus_ssp_resume(void* context)
}
spiphy_dev = (struct spiphy_dev_s *) context;
chip_poweron();
free_irq(gpio_to_irq(CMMB_1186_SPIIRQ), spiphy_dev);
//free_irq(gpio_to_irq(CMMB_1186_SPIIRQ), spiphy_dev);
//printk("siano 1186 request irq\n");
// spiirqgpio low , PULLUP , zyc
gpio_direction_output(CMMB_1186_SPIIRQ,0);
gpio_pull_updown(CMMB_1186_SPIIRQ,GPIOPullUp);
//gpio_pull_updown(CMMB_1186_SPIIRQ,GPIOPullDown);
//ret = request_gpio_irq(CMMB_1186_SPIIRQ, (pFunc)spibus_interrupt, GPIOEdgelRising, spiphy_dev);
request_irq(gpio_to_irq(CMMB_1186_SPIIRQ),spibus_interrupt,IRQF_TRIGGER_RISING,NULL,spiphy_dev);
//request_irq(gpio_to_irq(CMMB_1186_SPIIRQ),spibus_interrupt,IRQF_TRIGGER_RISING,NULL,spiphy_dev);
if(ret<0){
printk("siano1186 request irq failed !!\n");
ret = -EBUSY;
@ -513,62 +387,79 @@ int smsspibus_ssp_resume(void* context)
}
return 0 ;
fail1:
free_irq(CMMB_1186_SPIIRQ,NULL);
free_irq(gpio_to_irq(CMMB_1186_SPIIRQ), NULL);
return -1 ;
}
void *smsspiphy_init(void *context, void (*smsspi_interruptHandler)(void *),void *intr_context)
void *smsspiphy_init(void *context, void (*smsspi_interruptHandler) (void *),
void *intr_context)
{
int ret;
struct spiphy_dev_s *spiphy_dev;
u32 mode = 0, flags = 0, psp_flags = 0, speed = 0;
int error;
sms_debug("smsspiphy_init\n");
spiphy_dev = kmalloc(sizeof(struct spiphy_dev_s), GFP_KERNEL);
if(!spiphy_dev )
{
printk("spiphy_dev is null in smsspiphy_init\n") ;
sms_err("spiphy_dev is null in smsspiphy_init\n") ;
return NULL;
}
//zyc , requst gpio
//request_cmmb_gpio();
chip_powerdown();
spiphy_dev->interruptHandler = smsspi_interruptHandler;
spiphy_dev->intr_context = intr_context;
spiphy_dev->Smsdevice = (struct spi_device*)context;
spiphy_dev->Smsdevice = (struct spi_device*)context;
//gpio_pull_updown(CMMB_1186_SPIIRQ, IRQT_FALLING);
//set IRO GPIO as gpio mode ,zyc
//rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME,0);
//ÉèÖÃCMMB ÖжϽÅIOMUX
rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, 0);
error = gpio_request(CMMB_1186_SPIIRQ,"cmmb irq");
if (error) {
//dev_err(&pdev->dev, "failed to request play key gpio\n");
//goto free_gpio;
printk("gpio request error\n");
}
#if 0
gpio_direction_output(CMMB_1186_SPIIRQ,1);
printk("CMMB_1186_SPIIRQ !!!!\n");
mdelay(10000);
gpio_direction_output(CMMB_1186_SPIIRQ,0);
mdelay(10000);
#endif
//ret = request_gpio_irq(CMMB_1186_SPIIRQ, spibus_interrupt, GPIOEdgelRising, spiphy_dev);//
//zyc
gpio_direction_output(CMMB_1186_SPIIRQ,0);
gpio_pull_updown(CMMB_1186_SPIIRQ,GPIOPullUp);
//ret = request_gpio_irq(CMMB_1186_SPIIRQ, (pFunc)spibus_interrupt, GPIOEdgelRising, spiphy_dev);
request_irq(gpio_to_irq(CMMB_1186_SPIIRQ),spibus_interrupt,IRQF_TRIGGER_RISING,NULL,spiphy_dev);
//ret = request_gpio_irq(CMMB_-rwxrwxrwx 1 root root 8 2010-09-20 17:43 built-in.o
//-rwxrwxrwx 1 root root 6927 2010-09-19 10:42 compat.h
//-rwxrwxrwx 1 root root 1748 2010-09-21 15:06 Kconfig
//-rwxrwxrwx 1 root root 2518 2010-09-19 10:42 Makefile
//-rwxrwxrwx 1 root root 37 2010-09-21 20:27 modules.order
//-rwxrwxrwx 1 root root 9890 2010-09-19 10:42 sms-cards.c
//-rwxrwxrwx 1 root root 2752 2010-09-19 10:42 sms-cards.h
//-rwxrwxrwx 1 root root 5416 2010-09-21 19:47 sms-cards.o
//-rwxrwxrwx 1 root root 20493 2010-09-21 19:46 smschar.c
//-rwxrwxrwx 1 root root 1916 2010-09-19 10:42 smscharioctl.h
//-rwxrwxrwx 1 root root 12440 2010-09-21 19:47 smschar.o
//-rwxrwxrwx 1 root root 53173 2010-09-21 19:46 smscoreapi.c
//-rwxrwxrwx 1 root root 16701 2010-09-21 19:46 smscoreapi.h
//-rwxrwxrwx 1 root root 25516 2010-09-21 19:47 smscoreapi.o
//-rwxrwxrwx 1 root root 1982 2010-09-19 10:42 smsdbg_prn.h
//-rwxrwxrwx 1 root root 2409 2010-09-19 10:42 smsendian.c
//-rwxrwxrwx 1 root root 1100 2010-09-19 10:42 smsendian.h
//-rwxrwxrwx 1 root root 1140 2010-09-21 19:47 smsendian.o
//-rwxrwxrwx 1 root root 58990 2010-09-21 19:48 smsmdtv.ko
//-rwxrwxrwx 1 root root 1578 2010-09-19 16:15 smsmdtv.mod.c
//-rwxrwxrwx 1 root root 2984 2010-09-20 17:43 smsmdtv.mod.o
//-rwxrwxrwx 1 root root 56673 2010-09-21 19:47 smsmdtv.o
//-rwxrwxrwx 1 root root 11950 2010-09-21 19:46 smsspicommon.c
//-rwxrwxrwx 1 root root 2496 2010-09-19 10:42 smsspicommon.h
//-rwxrwxrwx 1 root root 3800 2010-09-21 19:47 smsspicommon.o
//-rwxrwxrwx 1 root root 23441 2010-09-21 19:46 smsspilog.c
//-rwxrwxrwx 1 root root 12260 2010-09-21 19:47 smsspilog.o
//-rwxrwxrwx 1 root root 1512 2010-09-19 10:42 smsspiphy.h
//-rwxrwxrwx 1 root root 20394 2010-09-17 11:22 smsspiphy_pxa.c
//-rwxrwxrwx 1 root root 11895 2010-09-21 19:46 smsspiphy_rk.c
//-rwxrwxrwx 1 root root 5480 2010-09-21 19:47 smsspiphy_rk.o
//root@zyc-desktop:/usr/android_source/android_cmmb_dev/kernel/kernel/drivers/cmmb/siano#
//
//1186_SPIIRQ, (pFunc)spibus_interrupt, GPIOEdgelRising, spiphy_dev);
request_irq(gpio_to_irq(CMMB_1186_SPIIRQ),spibus_interrupt,IRQF_TRIGGER_RISING,"inno_irq",spiphy_dev);
if(ret<0){
printk("siano 1186 request irq failed !!\n");
@ -583,23 +474,9 @@ void *smsspiphy_init(void *context, void (*smsspi_interruptHandler)(void *),void
return spiphy_dev;
error_irq:
//if (spiphy_dev->tx_dma_channel >= 0)
//pxa_free_dma(spiphy_dev->tx_dma_channel);
error_txdma:
//if (spiphy_dev->rx_dma_channel >= 0)
//pxa_free_dma(spiphy_dev->rx_dma_channel);
error_rxdma:
// ssp_exit(&spiphy_dev->sspdev);
error_sspinit:
//PDEBUG("exiting on error\n");
printk("exiting on error\n");
fail1:
free_irq(CMMB_1186_SPIIRQ,NULL);
free_irq(gpio_to_irq(CMMB_1186_SPIIRQ), spiphy_dev);
return 0;
}
int smsspiphy_deinit(void *context)
@ -613,22 +490,15 @@ int smsspiphy_deinit(void *context)
atomic_notifier_chain_unregister(&panic_notifier_list,
&sms_panic_notifier);
chip_powerdown();
PDEBUG("exiting\n");
sms_info("exiting\n");
free_irq(gpio_to_irq(CMMB_1186_SPIIRQ), spiphy_dev);
gpio_free(CMMB_1186_SPIIRQ);
return 0;
}
void smsspiphy_set_config(struct spiphy_dev_s *spiphy_dev, int clock_divider)
{
//u32 mode, flags, speed, psp_flags = 0;
//ssp_disable(&spiphy_dev->sspdev);
/* clock divisor for this mode. */
//speed = CLOCK_DIVIDER(clock_divider);
/* 32bit words in the fifo */
//mode = SSCR0_Motorola | SSCR0_DataSize(16) | SSCR0_EDSS;
//flags = SPI_RX_FIFO_RFT |SPI_TX_FIFO_TFT | SSCR1_TSRE |
//SSCR1_RSRE | SSCR1_RIE | SSCR1_TRAIL; /* | SSCR1_TIE */
//ssp_config(&spiphy_dev->sspdev, mode, flags, psp_flags, speed);
//ssp_enable(&spiphy_dev->sspdev);
;
}
void prepareForFWDnl(void *context)

13
drivers/fpga/spi_fpga_init.c
View File

@ -59,7 +59,7 @@ struct spi_fpga_port *pFpgaPort;
#define ID_SPI_FPGA_READ 2
struct spi_fpga_transfer
{
const u8 *txbuf;
u8 *txbuf;
unsigned n_tx;
u8 *rxbuf;
unsigned n_rx;
@ -72,9 +72,10 @@ static void spi_fpga_trans_work_handler(struct work_struct *work)
struct spi_fpga_port *port =
container_of(work, struct spi_fpga_port, fpga_trans_work);
unsigned long flags;
spin_lock_irqsave(&port->work_lock, flags);
while (!list_empty(&port->trans_queue))
{
spin_unlock_irqrestore(&port->work_lock, flags);
struct spi_fpga_transfer *t = NULL, *tmp;
list_for_each_entry_safe(t, tmp, &port->trans_queue, queue)
{
@ -96,13 +97,13 @@ static void spi_fpga_trans_work_handler(struct work_struct *work)
}
spin_lock_irqsave(&port->work_lock, flags);
list_del_init(&port->trans_queue);
spin_unlock_irqrestore(&port->work_lock, flags);
}
}
spin_unlock_irqrestore(&port->work_lock, flags);
}
int spi_write_work(struct spi_device *spi, const u8 *buf, size_t len)
int spi_write_work(struct spi_device *spi, u8 *buf, size_t len)
{
struct spi_fpga_port *port = spi_get_drvdata(spi);
struct spi_fpga_transfer *t;
@ -325,7 +326,7 @@ void spi_out(struct spi_fpga_port *port, int reg, int value, int type)
tx_buf[1] = (value>>8) & 0xff;
tx_buf[2] = value & 0xff;
if(reg_temp == UART_IER)
spi_write_work(port->spi, (const u8 *)&tx_buf, sizeof(tx_buf));
spi_write_work(port->spi, tx_buf, sizeof(tx_buf));
else
spi_write(port->spi, (const u8 *)&tx_buf, sizeof(tx_buf));
DBG("%s,SEL_UART reg=0x%x,value=0x%x\n",__FUNCTION__,reg&0xff,value&0xffff);

4
drivers/fpga/spi_i2c.c
View File

@ -153,7 +153,7 @@ int spi_i2c_readbuf(struct spi_fpga_port *port ,struct i2c_msg *pmsg,int ch)
spi_out(port,reg,len,SEL_I2C);
#if SPI_FPGA_I2C_EVENT
ret = wait_event_timeout(port->i2c.wait_r, port->i2c.interrupt == INT_I2C_READ_ACK, msecs_to_jiffies(60));
ret = wait_event_timeout(port->i2c.wait_r, ((port->i2c.interrupt == INT_I2C_READ_ACK) || (port->i2c.interrupt == INT_I2C_READ_NACK)), msecs_to_jiffies(60));
if(ret == 0)
{
printk("%s:60ms time out!\n",__FUNCTION__);
@ -243,7 +243,7 @@ int spi_i2c_writebuf(struct spi_fpga_port *port ,struct i2c_msg *pmsg,int ch)
reg = channel|ICE_SEL_I2C_STOP;
spi_out(port,reg,pmsg->buf[i],SEL_I2C);
#if SPI_FPGA_I2C_EVENT
ret = wait_event_timeout(port->i2c.wait_w, port->i2c.interrupt == INT_I2C_WRITE_ACK, msecs_to_jiffies(60));
ret = wait_event_timeout(port->i2c.wait_w, ((port->i2c.interrupt == INT_I2C_WRITE_ACK) || (port->i2c.interrupt == INT_I2C_WRITE_NACK)), msecs_to_jiffies(60));
if(ret == 0)
{
printk("%s:60ms time out!\n",__FUNCTION__);

24
drivers/fpga/spi_uart.c
View File

@ -400,20 +400,15 @@ static void spi_uart_receive_chars(struct spi_uart *uart, unsigned int *status)
{
struct tty_struct *tty = uart->tty;
struct spi_fpga_port *port = container_of(uart, struct spi_fpga_port, uart);
unsigned int ch, flag;
unsigned char ch, flag;
int max_count = 1024;
DBG("rx:");
#if SPI_UART_TXRX_BUF
int ret,count,stat = 0;
int ret,count,stat = *status;
int i = 0;
unsigned char buf[SPI_UART_FIFO_LEN];
while (max_count >0 )
while (stat & UART_LSR_DR)
{
stat = spi_in(port, UART_LSR, SEL_UART);
if((((stat >> 8) & 0x3f) != 0) && (!(stat & UART_LSR_DR)))
printk("%s:warning:no receive data but count =%d \n",__FUNCTION__,((stat >> 8) & 0x3f));
if(!(stat & UART_LSR_DR))
break;
ret = spi_in(port, UART_RX, SEL_UART);
count = (ret >> 8) & 0x3f;
DBG("%s:count=%d\n",__FUNCTION__,count);
@ -427,18 +422,19 @@ static void spi_uart_receive_chars(struct spi_uart *uart, unsigned int *status)
printk("err:%s:stat=%d,fail to read uart data because of spi bus error!\n",__FUNCTION__,stat);
}
max_count -= count;
flag = TTY_NORMAL;
uart->icount.rx += count;
for(i=0;i<count;i++)
{
flag = TTY_NORMAL;
uart->icount.rx++;
ch = buf[i];
tty_insert_flip_char(tty, ch, flag);
DBG("0x%x,",ch);
}
tty_flip_buffer_push(tty);
DBG("\n");
stat = spi_in(port, UART_LSR, SEL_UART) & 0xff;
}
tty_flip_buffer_push(tty);
DBG("\n");
#else
@ -912,7 +908,7 @@ static int spi_uart_open (struct tty_struct *tty, struct file * filp)
static void spi_uart_close(struct tty_struct *tty, struct file * filp)
{
struct spi_uart *uart = tty->driver_data;
printk("%s:LINE=%d,tty->hw_stopped=%d\n",__FUNCTION__,__LINE__,tty->hw_stopped);
DBG("%s:LINE=%d,tty->hw_stopped=%d\n",__FUNCTION__,__LINE__,tty->hw_stopped);
if (!uart)
return;
@ -1001,7 +997,7 @@ static int spi_uart_write_room(struct tty_struct *tty)
static int spi_uart_chars_in_buffer(struct tty_struct *tty)
{
struct spi_uart *uart = tty->driver_data;
printk("%s:LINE=%d,circ=%ld\n",__FUNCTION__,__LINE__,circ_chars_pending(&uart->xmit));
DBG("%s:LINE=%d,circ=%ld\n",__FUNCTION__,__LINE__,circ_chars_pending(&uart->xmit));
return uart ? circ_chars_pending(&uart->xmit) : 0;
}
@ -1009,7 +1005,7 @@ static void spi_uart_send_xchar(struct tty_struct *tty, char ch)
{
struct spi_uart *uart = tty->driver_data;
struct spi_fpga_port *port = container_of(uart, struct spi_fpga_port, uart);
printk("%s:LINE=%d\n",__FUNCTION__,__LINE__);
DBG("%s:LINE=%d\n",__FUNCTION__,__LINE__);
uart->x_char = ch;
if (ch && !(uart->ier & UART_IER_THRI)) {
mutex_lock(&port->spi_lock);

46
drivers/i2c/busses/i2c-rk2818.c
View File

@ -85,7 +85,7 @@ struct rk2818_i2c_data {
unsigned int msg_num;
#ifdef CONFIG_CPU_FREQ
struct notifier_block freq_transition;
#endif
#endif
};
static void rk2818_i2c_init_hw(struct rk2818_i2c_data *i2c);
@ -230,19 +230,22 @@ static int rk2818_wait_event(struct rk2818_i2c_data *i2c,
enum rk2818_event mr_event)
{
int ret = 0;
if(unlikely(irqs_disabled()))
unsigned long flags;
if(i2c->mode == I2C_MODE_IRQ)
{
dev_err(i2c->dev, "irqs are disabled on this system!\n");
return -EIO;
}
spin_lock_irq(&i2c->cmd_lock);
if(unlikely(irqs_disabled()))
{
dev_err(i2c->dev, "irqs are disabled on this system!\n");
return -EIO;
}
}
spin_lock_irqsave(&i2c->cmd_lock,flags);
i2c->cmd_err = RK2818_ERROR_NONE;
i2c->cmd_event = mr_event;
init_completion(&i2c->cmd_complete);
spin_unlock_irq(&i2c->cmd_lock);
spin_unlock_irqrestore(&i2c->cmd_lock,flags);
rk2818_i2c_enable_irqs(i2c);
if(i2c->mode == I2C_MODE_IRQ)
@ -461,6 +464,17 @@ static int rk2818_xfer_msg(struct i2c_adapter *adap,
{
dev_err(i2c->dev, "<error>rk2818_i2c_stop timeout\n");
}
//not I2C code,add by sxj,used for extend gpio intrrupt,set SCL and SDA pin.
if(msg->flags & I2C_M_RD)
{
#if defined (CONFIG_IOEXTEND_TCA6424)
if (pdata && pdata->reseti2cpin) {
pdata->reseti2cpin();
}
#endif
}
}
return ret;
@ -473,9 +487,10 @@ static int rk2818_i2c_xfer(struct i2c_adapter *adap,
int i;
struct rk2818_i2c_data *i2c = (struct rk2818_i2c_data *)adap->algo_data;
unsigned long conr = readl(i2c->regs + I2C_CONR);
/*
if(i2c->suspended ==1)
return -EIO;
*/
if(msgs[0].scl_rate <= 400000 && msgs[0].scl_rate > 0)
i2c->scl_rate = msgs[0].scl_rate;
else
@ -516,7 +531,17 @@ static const struct i2c_algorithm rk2818_i2c_algorithm = {
.functionality = rk2818_i2c_func,
};
int i2c_suspended(struct i2c_adapter *adap)
{
struct rk2818_i2c_data *i2c = (struct rk2818_i2c_data *)adap->algo_data;
if(adap->nr > 1)
return 1;
if(i2c == NULL)
return 1;
return i2c->suspended;
}
EXPORT_SYMBOL(i2c_suspended);
static void rk2818_i2c_init_hw(struct rk2818_i2c_data *i2c)
{
unsigned long lcmr = 0x00000000;
@ -735,6 +760,7 @@ static int rk2818_i2c_remove(struct platform_device *pdev)
}
#ifdef CONFIG_PM
static int rk2818_i2c_suspend(struct platform_device *pdev, pm_message_t state)
{
struct rk2818_i2c_data *i2c = platform_get_drvdata(pdev);

6
drivers/i2c/i2c-core.c Normal file → Executable file
View File

@ -1091,8 +1091,12 @@ int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
(msgs[ret].flags & I2C_M_RECV_LEN) ? "+" : "");
}
#endif
#ifdef CONFIG_I2C_RK2818
if (!(i2c_suspended(adap)) && (in_atomic() || irqs_disabled())) {
#else
if (in_atomic() || irqs_disabled()) {
#endif
ret = mutex_trylock(&adap->bus_lock);
if (!ret)
/* I2C activity is ongoing. */

5
drivers/input/misc/capella_cm3602.c
View File

@ -193,6 +193,9 @@ static int capella_cm3602_setup(struct capella_cm3602_data *ip)
setup_timer(&ip->cm3602_timer,cm3602_timer,(unsigned long)ip);
ip->cm3602_timer.expires = jiffies + HZ;
add_timer(&ip->cm3602_timer);
//chenli:psensor off by default
ip->pdata->power(0);
/*
rc = set_irq_wake(irq, 1);
if (rc < 0) {
@ -318,7 +321,7 @@ static int capella_cm3602_probe(struct platform_device *pdev)
rc = capella_cm3602_setup(ip);
if (!rc)
goto done;
misc_deregister(&capella_cm3602_misc);
err_unregister_input_device:
input_unregister_device(input_dev);

6
drivers/regulator/rk2818_lp8725.c
View File

@ -219,7 +219,7 @@ static int lp8725_lilo_is_enabled(struct regulator_dev *dev)
{
struct lp8725 *lp8725 = rdev_get_drvdata(dev);
int lilo = rdev_get_id(dev) - LP8725_LILO1;
u16 mask = 1 << (lilo+4);
u16 mask = 1 << (lilo+5);
u16 val;
val = lp8725_reg_read(lp8725, LP8725_LILO_ENABLE_REG);
@ -230,7 +230,7 @@ static int lp8725_lilo_enable(struct regulator_dev *dev)
{
struct lp8725 *lp8725 = rdev_get_drvdata(dev);
int lilo = rdev_get_id(dev) - LP8725_LILO1;
u16 mask = 1 << (lilo+4);
u16 mask = 1 << (lilo+5);
return lp8725_set_bits(lp8725, LP8725_LILO_ENABLE_REG, mask, mask);
}
@ -239,7 +239,7 @@ static int lp8725_lilo_disable(struct regulator_dev *dev)
{
struct lp8725 *lp8725 = rdev_get_drvdata(dev);
int lilo = rdev_get_id(dev) - LP8725_LILO1;
u16 mask = 1 << (lilo+4);
u16 mask = 1 << (lilo+5);
return lp8725_set_bits(lp8725, LP8725_LILO_ENABLE_REG, mask, 0);
}

2
drivers/spi/rk2818_spim.c
View File

@ -744,8 +744,8 @@ static void do_read(struct rk2818_spi *dws)
spi_enable_chip(dws, 0);
rk2818_writew(dws, SPIM_CTRLR1, dws->rx_end-dws->rx-1);
spi_enable_chip(dws, 1);
rk2818_writew(dws, SPIM_DR0, 0);
while (1) {
rk2818_writew(dws, SPIM_DR0, 0);
if (dws->read(dws))
break;
if (count ++ == 0x20) {

1
include/linux/i2c.h Normal file → Executable file
View File

@ -62,6 +62,7 @@ extern int i2c_master_reg8_send(struct i2c_client *client, const char reg, const
extern int i2c_master_reg8_recv(struct i2c_client *client, const char reg, char *buf, int count, int scl_rate);
extern int i2c_master_reg16_send(struct i2c_client *client, const short regs, const short *buf, int count, int scl_rate);
extern int i2c_master_reg16_recv(struct i2c_client *client, const short regs, short *buf, int count, int scl_rate);
extern int i2c_suspended(struct i2c_adapter *adap);
#endif
extern int i2c_master_send(struct i2c_client *client, const char *buf,

98
sound/soc/codecs/wm8994.c
View File

@ -376,12 +376,15 @@ void recorder_and_AP_to_headset(void)
wm8994_write(0x04, 0x0303); // AIF1ADC1L_ENA=1, AIF1ADC1R_ENA=1, ADCL_ENA=1, ADCR_ENA=1
wm8994_write(0x05, 0x0303); // AIF1DAC1L_ENA=1, AIF1DAC1R_ENA=1, DAC1L_ENA=1, DAC1R_ENA=1
wm8994_write(0x420, 0x0000);
wm8994_write(0x700, 0xA101);
#ifdef CONFIG_SND_CODEC_SOC_MASTER
wm8994_write(0x303, 0x0040); // AIF1 BCLK DIV--------AIF1CLK/4
wm8994_write(0x304, 0x0040); // AIF1 ADCLRCK DIV-----BCLK/64
wm8994_write(0x305, 0x0040); // AIF1 DACLRCK DIV-----BCLK/64
wm8994_write(0x302, 0x4000); // AIF1_MSTR=1
wm8994_write(0x302, 0x3000); // AIF1_MSTR=1
msleep(50);
wm8994_write(0x302, 0x7000); // AIF1_MSTR=1
msleep(50);
#endif
}
@ -469,7 +472,10 @@ void recorder_and_AP_to_speakers(void)
wm8994_write(0x303, 0x0040); // AIF1 BCLK DIV--------AIF1CLK/4
wm8994_write(0x304, 0x0040); // AIF1 ADCLRCK DIV-----BCLK/64
wm8994_write(0x305, 0x0040); // AIF1 DACLRCK DIV-----BCLK/64
wm8994_write(0x302, 0x4000); // AIF1_MSTR=1
wm8994_write(0x302, 0x3000); // AIF1_MSTR=1
msleep(50);
wm8994_write(0x302, 0x7000); // AIF1_MSTR=1
msleep(50);
#endif
}
@ -712,11 +718,15 @@ void handsetMIC_to_baseband_to_headset(void)
wm8994_write(0x610, 0x01A0); //DAC1 Left Volume bit0~7
wm8994_write(0x611, 0x01A0); //DAC1 Right Volume bit0~7
#ifdef CONFIG_SND_CODEC_SOC_MASTER
wm8994_write(0x700, 0xA101);
#ifdef CONFIG_SND_CODEC_SOC_MASTER
wm8994_write(0x303, 0x0040); // AIF1 BCLK DIV--------AIF1CLK/4
wm8994_write(0x304, 0x0040); // AIF1 ADCLRCK DIV-----BCLK/64
wm8994_write(0x305, 0x0040); // AIF1 DACLRCK DIV-----BCLK/64
wm8994_write(0x302, 0x4000); // AIF1_MSTR=1
wm8994_write(0x302, 0x3000); // AIF1_MSTR=1
msleep(50);
wm8994_write(0x302, 0x7000); // AIF1_MSTR=1
msleep(50);
#endif
}
@ -857,12 +867,15 @@ void mainMIC_to_baseband_to_earpiece(void)
wm8994_write(0x611, 0x01C0); //DAC1_VU=1, DAC1R_VOL=1100_0000
wm8994_write(0x420, 0x0000);
wm8994_write(0x700, 0xA101);
#ifdef CONFIG_SND_CODEC_SOC_MASTER
wm8994_write(0x303, 0x0040); // AIF1 BCLK DIV--------AIF1CLK/4
wm8994_write(0x304, 0x0040); // AIF1 ADCLRCK DIV-----BCLK/64
wm8994_write(0x305, 0x0040); // AIF1 DACLRCK DIV-----BCLK/64
wm8994_write(0x302, 0x4000); // AIF1_MSTR=1
wm8994_write(0x302, 0x3000); // AIF1_MSTR=1
msleep(50);
wm8994_write(0x302, 0x7000); // AIF1_MSTR=1
msleep(50);
#endif
}
@ -927,12 +940,15 @@ void mainMIC_to_baseband_to_earpiece_I2S(void)
wm8994_write(0x611, 0x01FF); //DAC1_VU=1, DAC1R_VOL=1100_0000
wm8994_write(0x420, 0x0000);
wm8994_write(0x700, 0xA101);
#ifdef CONFIG_SND_CODEC_SOC_MASTER
wm8994_write(0x303, 0x0040); // AIF1 BCLK DIV--------AIF1CLK/4
wm8994_write(0x304, 0x0040); // AIF1 ADCLRCK DIV-----BCLK/64
wm8994_write(0x305, 0x0040); // AIF1 DACLRCK DIV-----BCLK/64
wm8994_write(0x302, 0x4000); // AIF1_MSTR=1
wm8994_write(0x302, 0x3000); // AIF1_MSTR=1
msleep(50);
wm8994_write(0x302, 0x7000); // AIF1_MSTR=1
msleep(50);
#endif
}
@ -1047,12 +1063,15 @@ void mainMIC_to_baseband_to_speakers(void)
wm8994_write(0x610, 0x01c0); //DAC1 Left Volume bit0~7
wm8994_write(0x611, 0x01c0); //DAC1 Right Volume bit0~7
wm8994_write(0x700, 0xA101);
#ifdef CONFIG_SND_CODEC_SOC_MASTER
wm8994_write(0x303, 0x0040); // AIF1 BCLK DIV--------AIF1CLK/4
wm8994_write(0x304, 0x0040); // AIF1 ADCLRCK DIV-----BCLK/64
wm8994_write(0x305, 0x0040); // AIF1 DACLRCK DIV-----BCLK/64
wm8994_write(0x302, 0x4000); // AIF1_MSTR=1
wm8994_write(0x302, 0x3000); // AIF1_MSTR=1
msleep(50);
wm8994_write(0x302, 0x7000); // AIF1_MSTR=1
msleep(50);
#endif
}
@ -1110,8 +1129,13 @@ void BT_baseband(void)
wm8994_write(0x04, 0x3303);
wm8994_write(0x05, 0x3002);
wm8994_write(0x06, 0x000A);
wm8994_set_volume(wm8994_current_mode,call_vol,call_maxvol);
wm8994_write(0x1E, 0x0006);
#ifdef CONFIG_SND_BB_NORMAL_INPUT
wm8994_write(0x28, 0x00C0);
#endif
#ifdef CONFIG_SND_BB_DIFFERENTIAL_INPUT
wm8994_write(0x28, 0x00CC);
#endif
wm8994_write(0x29, 0x0100);
vol=CONFIG_WM8994_BT_INCALL_MIC_VOL;
if(vol>6)vol=6;
@ -1122,13 +1146,7 @@ void BT_baseband(void)
if(vol>30)vol=30;
if(vol<0)vol=0;
if(vol>30)wm8994_write(0x29, 0x0130);
#ifdef CONFIG_SND_BB_NORMAL_INPUT
wm8994_write(0x28, 0x00C0);
#endif
#ifdef CONFIG_SND_BB_DIFFERENTIAL_INPUT
wm8994_write(0x28, 0x00CC);
#endif
wm8994_set_volume(wm8994_current_mode,call_vol,call_maxvol);
wm8994_write(0x2A, 0x0100);
wm8994_write(0x2D, 0x0001);
wm8994_write(0x34, 0x0001);
@ -1142,7 +1160,11 @@ void BT_baseband(void)
wm8994_write(0x221, 0x2F00); // SMbus_16inx_16dat Write 0x34 * FLL1 Control (2)(221H): 0700 FLL1_OUTDIV=2Fh, FLL1_CTRL_RATE=000, FLL1_FRATIO=000
wm8994_write(0x222, 0x3126); // SMbus_16inx_16dat Write 0x34 * FLL1 Control (3)(222H): 8FD5 FLL1_K=3126h
wm8994_write(0x223, 0x0100); // SMbus_16inx_16dat Write 0x34 * FLL1 Control (4)(223H): 00E0 FLL1_N=8h, FLL1_GAIN=0000
wm8994_write(0x303, 0x0090);
wm8994_write(0x310, 0xC118); //DSP/PCM; 16bits; ADC L channel = R channel;MODE A
wm8994_write(0x313, 0x0020); // SMbus_16inx_16dat Write 0x34 * AIF2 BCLK DIV--------AIF1CLK/2
wm8994_write(0x314, 0x0080); // SMbus_16inx_16dat Write 0x34 * AIF2 ADCLRCK DIV-----BCLK/128
wm8994_write(0x315, 0x0080); // SMbus_16inx_16dat Write 0x34 * AIF2 DACLRCK DIV-----BCLK/128
wm8994_write(0x210, 0x0003); // SMbus_16inx_16dat Write 0x34 * SR=8KHz
wm8994_write(0x220, 0x0004); // SMbus_16inx_16dat Write 0x34 * FLL1 Control (1)(220H): 0005 FLL1_FRACN_ENA=1, FLL1_OSC_ENA=0, FLL1_ENA=0
msleep(50);
@ -1150,22 +1172,14 @@ void BT_baseband(void)
wm8994_write(0x200, 0x0011);
wm8994_write(0x204, 0x0011); // SMbus_16inx_16dat Write 0x34 * AIF2 Clocking (1)(204H): 0011 AIF2CLK_SRC=10, AIF2CLK_INV=0, AIF2CLK_DIV=0, AIF2CLK_ENA=1
wm8994_write(0x440, 0x0018);
wm8994_write(0x450, 0x0018);
wm8994_write(0x480, 0x0000);
wm8994_write(0x481, 0x0000);
wm8994_write(0x4A0, 0x0000);
wm8994_write(0x4A1, 0x0000);
wm8994_write(0x520, 0x0000);
wm8994_write(0x540, 0x0018);
wm8994_write(0x580, 0x0000);
wm8994_write(0x581, 0x0000);
wm8994_write(0x601, 0x0004);
wm8994_write(0x603, 0x000C);
wm8994_write(0x604, 0x0010);
wm8994_write(0x605, 0x0010);
//wm8994_write(0x606, 0x0003);
//wm8994_write(0x607, 0x0003);
wm8994_write(0x606, 0x0003);
wm8994_write(0x607, 0x0003);
wm8994_write(0x610, 0x01C0);
wm8994_write(0x612, 0x01C0);
wm8994_write(0x613, 0x01C0);
@ -1174,22 +1188,28 @@ void BT_baseband(void)
//roger_chen@20100519
//enable AIF2 BCLK,LRCK
//Rev.B and Rev.D is different
wm8994_write(0x702, 0xA100);
wm8994_write(0x703, 0xA100);
wm8994_write(0x700, 0xA101);
wm8994_write(0x704, 0xA100);
wm8994_write(0x707, 0xA100);
wm8994_write(0x708, 0x2100);
wm8994_write(0x709, 0x2100);
wm8994_write(0x70A, 0x2100);
msleep(10);
wm8994_write(0x702, 0xA100);
wm8994_write(0x703, 0xA100);
wm8994_write(0x603, 0x018C);
wm8994_write(0x605, 0x0020);
#ifdef CONFIG_SND_CODEC_SOC_MASTER
wm8994_write(0x303, 0x0090);
wm8994_write(0x313, 0x0020); // SMbus_16inx_16dat Write 0x34 * AIF2 BCLK DIV--------AIF1CLK/2
wm8994_write(0x314, 0x0080); // SMbus_16inx_16dat Write 0x34 * AIF2 ADCLRCK DIV-----BCLK/128
wm8994_write(0x315, 0x0080); // SMbus_16inx_16dat Write 0x34 * AIF2 DACLRCK DIV-----BCLK/128
wm8994_write(0x302, 0x4000);
wm8994_write(0x312, 0x4000); // SMbus_16inx_16dat Write 0x34 * AIF2 Master/Slave(312H): 7000 AIF2_TRI=0, AIF2_MSTR=1, AIF2_CLK_FRC=0, AIF2_LRCLK_FRC=0
wm8994_write(0x302, 0x3000); // AIF1_MSTR=1
msleep(10);
wm8994_write(0x302, 0x7000); // AIF1_MSTR=1
msleep(10);
wm8994_write(0x312, 0x3000); // AIF1_MSTR=1
msleep(10);
wm8994_write(0x312, 0x7000); // AIF1_MSTR=1
msleep(10);
#endif
}