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drm/i915/dsb: Extract intel_dsb_ins_align()

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Extract the code that alings the next instruction to the next
QW boundary into a small helper. I'll have some more uses for
this later.

Also explain why we don't have to zero out the extra DW.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://lore.kernel.org/r/20250523062041.166468-2-chaitanya.kumar.borah@intel.com
This commit is contained in:
Ville Syrjälä 2025-05-23 11:50:31 +05:30 committed by Animesh Manna
parent 42e5fc672f
commit 55f233aaad
1 changed files with 14 additions and 2 deletions
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16
drivers/gpu/drm/i915/display/intel_dsb.c
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@ -228,13 +228,25 @@ static bool is_dsb_busy(struct intel_display *display, enum pipe pipe,
return intel_de_read_fw(display, DSB_CTRL(pipe, dsb_id)) & DSB_STATUS_BUSY;
}
static void intel_dsb_ins_align(struct intel_dsb *dsb)
{
/*
* Every instruction should be 8 byte aligned.
*
* The only way to get unaligned free_pos is via
* intel_dsb_reg_write_indexed() which already
* makes sure the next dword is zeroed, so no need
* to clear it here.
*/
dsb->free_pos = ALIGN(dsb->free_pos, 2);
}
static void intel_dsb_emit(struct intel_dsb *dsb, u32 ldw, u32 udw)
{
if (!assert_dsb_has_room(dsb))
return;
/* Every instruction should be 8 byte aligned. */
dsb->free_pos = ALIGN(dsb->free_pos, 2);
intel_dsb_ins_align(dsb);
dsb->ins_start_offset = dsb->free_pos;
dsb->ins[0] = ldw;