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drm/amdkfd: hard-code cacheline for gc943,gc944
Cacheline size is not available in IP discovery for gc943,gc944. Signed-off-by: David Yat Sin <David.YatSin@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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@ -1510,6 +1510,8 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
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if (adev->gfx.config.gc_tcp_size_per_cu) {
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pcache_info[i].cache_size = adev->gfx.config.gc_tcp_size_per_cu;
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pcache_info[i].cache_level = 1;
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/* Cacheline size not available in IP discovery for gc943,gc944 */
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pcache_info[i].cache_line_size = 128;
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pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
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CRAT_CACHE_FLAGS_DATA_CACHE |
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CRAT_CACHE_FLAGS_SIMD_CACHE);
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@ -1521,6 +1523,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
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pcache_info[i].cache_size =
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adev->gfx.config.gc_l1_instruction_cache_size_per_sqc;
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pcache_info[i].cache_level = 1;
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pcache_info[i].cache_line_size = 64;
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pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
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CRAT_CACHE_FLAGS_INST_CACHE |
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CRAT_CACHE_FLAGS_SIMD_CACHE);
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@ -1531,6 +1534,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
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if (adev->gfx.config.gc_l1_data_cache_size_per_sqc) {
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pcache_info[i].cache_size = adev->gfx.config.gc_l1_data_cache_size_per_sqc;
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pcache_info[i].cache_level = 1;
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pcache_info[i].cache_line_size = 64;
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pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
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CRAT_CACHE_FLAGS_DATA_CACHE |
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CRAT_CACHE_FLAGS_SIMD_CACHE);
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@ -1541,6 +1545,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
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if (adev->gfx.config.gc_tcc_size) {
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pcache_info[i].cache_size = adev->gfx.config.gc_tcc_size;
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pcache_info[i].cache_level = 2;
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pcache_info[i].cache_line_size = 128;
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pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
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CRAT_CACHE_FLAGS_DATA_CACHE |
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CRAT_CACHE_FLAGS_SIMD_CACHE);
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@ -1551,6 +1556,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
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if (adev->gmc.mall_size) {
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pcache_info[i].cache_size = adev->gmc.mall_size / 1024;
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pcache_info[i].cache_level = 3;
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pcache_info[i].cache_line_size = 64;
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pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
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CRAT_CACHE_FLAGS_DATA_CACHE |
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CRAT_CACHE_FLAGS_SIMD_CACHE);
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