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drm/amd/display: Allow power up when PG disallowed in driver

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[Why]
Do not exit early dcn42 pg control functions on power up for pipe PG
failsafe.

Reviewed-by: Leo Chen <leo.chen@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Charlene Liu 2026-04-27 19:09:02 -04:00 committed by Alex Deucher
parent 246ff639ec
commit 55e69772bd
1 changed files with 24 additions and 19 deletions
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43
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c
View File

@ -27,9 +27,6 @@ static bool pg_cntl42_dsc_pg_status(struct pg_cntl *pg_cntl, unsigned int dsc_in
struct dcn_pg_cntl *pg_cntl_dcn = TO_DCN_PG_CNTL(pg_cntl);
uint32_t pwr_status = 0;
if (pg_cntl->ctx->dc->debug.ignore_pg)
return true;
switch (dsc_inst) {
case 0: /* DSC0 */
REG_GET(DOMAIN16_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, &pwr_status);
@ -64,9 +61,11 @@ void pg_cntl42_dsc_pg_control(struct pg_cntl *pg_cntl, unsigned int dsc_inst, bo
pg_cntl->ctx->dc->res_pool->dccg->funcs->enable_dsc(
pg_cntl->ctx->dc->res_pool->dccg, dsc_inst);
if (pg_cntl->ctx->dc->debug.ignore_pg ||
pg_cntl->ctx->dc->debug.disable_dsc_power_gate ||
pg_cntl->ctx->dc->idle_optimizations_allowed)
bool skip_pg = pg_cntl->ctx->dc->debug.ignore_pg ||
pg_cntl->ctx->dc->debug.disable_dsc_power_gate ||
pg_cntl->ctx->dc->idle_optimizations_allowed;
if (skip_pg && !power_on)
return;
block_enabled = pg_cntl42_dsc_pg_status(pg_cntl, dsc_inst);
@ -261,11 +260,12 @@ void pg_cntl42_hpo_pg_control(struct pg_cntl *pg_cntl, bool power_on)
uint32_t power_forceon;
bool block_enabled;
if (pg_cntl->ctx->dc->debug.ignore_pg ||
pg_cntl->ctx->dc->debug.disable_hpo_power_gate ||
pg_cntl->ctx->dc->idle_optimizations_allowed)
return;
bool skip_pg = pg_cntl->ctx->dc->debug.ignore_pg ||
pg_cntl->ctx->dc->debug.disable_hpo_power_gate ||
pg_cntl->ctx->dc->idle_optimizations_allowed;
if (skip_pg && !power_on)
return;
block_enabled = pg_cntl42_hpo_pg_status(pg_cntl);
if (power_on) {
if (block_enabled)
@ -316,9 +316,11 @@ void pg_cntl42_io_clk_pg_control(struct pg_cntl *pg_cntl, bool power_on)
uint32_t power_forceon;
bool block_enabled;
if (pg_cntl->ctx->dc->debug.ignore_pg ||
pg_cntl->ctx->dc->idle_optimizations_allowed ||
pg_cntl->ctx->dc->debug.disable_io_clk_power_gate)
bool skip_pg = pg_cntl->ctx->dc->debug.ignore_pg ||
pg_cntl->ctx->dc->idle_optimizations_allowed ||
pg_cntl->ctx->dc->debug.disable_io_clk_power_gate;
if (skip_pg && !power_on)
return;
block_enabled = pg_cntl42_io_clk_status(pg_cntl);
@ -412,9 +414,11 @@ void pg_cntl42_mem_pg_control(struct pg_cntl *pg_cntl, bool power_on)
uint32_t power_forceon;
bool block_enabled;
if (pg_cntl->ctx->dc->debug.ignore_pg ||
pg_cntl->ctx->dc->idle_optimizations_allowed ||
pg_cntl->ctx->dc->debug.disable_mem_power_gate)
bool skip_pg = pg_cntl->ctx->dc->debug.ignore_pg ||
pg_cntl->ctx->dc->idle_optimizations_allowed ||
pg_cntl->ctx->dc->debug.disable_mem_power_gate;
if (skip_pg && !power_on)
return;
block_enabled = pg_cntl42_mem_status(pg_cntl);
@ -464,9 +468,10 @@ void pg_cntl42_dio_pg_control(struct pg_cntl *pg_cntl, bool power_on)
uint32_t org_ip_request_cntl;
bool block_enabled;
if (pg_cntl->ctx->dc->debug.ignore_pg ||
pg_cntl->ctx->dc->idle_optimizations_allowed ||
pg_cntl->ctx->dc->debug.disable_dio_power_gate)
bool skip_pg = pg_cntl->ctx->dc->debug.ignore_pg ||
pg_cntl->ctx->dc->idle_optimizations_allowed ||
pg_cntl->ctx->dc->debug.disable_dio_power_gate;
if (skip_pg && !power_on)
return;
block_enabled = pg_cntl42_dio_pg_status(pg_cntl);