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riscv: vector: Fix output operands in context save

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The __vstate_csr_save() inline assembly declares vcsr as an output
operand while the assembly only writes vstart, vtype, and vl. Remove it
as it is later saved by the C code.

Fixes: d863910eab ("riscv: vector: Support xtheadvector save/restore")
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Link: https://patch.msgid.link/20260911194218.3379486-1-aurelien@aurel32.net
Signed-off-by: Paul Walmsley <pjw@kernel.org>
This commit is contained in:
Aurelien Jarno 2026-10-05 19:02:37 -06:00 committed by Paul Walmsley
parent 572b25f3a6
commit 55b1276ef9
1 changed files with 2 additions and 2 deletions
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4
arch/riscv/include/asm/vector.h
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@ -137,8 +137,8 @@ static __always_inline void __vstate_csr_save(struct __riscv_v_ext_state *dest)
"csrr %0, " __stringify(CSR_VSTART) "\n\t"
"csrr %1, " __stringify(CSR_VTYPE) "\n\t"
"csrr %2, " __stringify(CSR_VL) "\n\t"
: "=r" (dest->vstart), "=r" (dest->vtype), "=r" (dest->vl),
"=r" (dest->vcsr) : :);
: "=r" (dest->vstart), "=r" (dest->vtype), "=r" (dest->vl)
: :);
if (has_xtheadvector()) {
unsigned long status;