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drm/amd/display: collapse dce11 reset_hw_ctx_wrap into 1 function
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1345,28 +1345,6 @@ static void switch_dp_clock_sources(
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* Public functions
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******************************************************************************/
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static void reset_single_pipe_hw_ctx(
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const struct core_dc *dc,
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struct pipe_ctx *pipe_ctx,
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struct validate_context *context)
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{
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core_link_disable_stream(pipe_ctx);
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pipe_ctx->tg->funcs->set_blank(pipe_ctx->tg, true);
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if (!hwss_wait_for_blank_complete(pipe_ctx->tg)) {
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dm_error("DC: failed to blank crtc!\n");
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BREAK_TO_DEBUGGER();
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}
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pipe_ctx->tg->funcs->disable_crtc(pipe_ctx->tg);
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pipe_ctx->mi->funcs->free_mem_input(
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pipe_ctx->mi, context->stream_count);
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resource_unreference_clock_source(&context->res_ctx, dc->res_pool,
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&pipe_ctx->clock_source);
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dc->hwss.power_down_front_end((struct core_dc *)dc, pipe_ctx->pipe_idx);
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pipe_ctx->stream = NULL;
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}
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static void set_drr(struct pipe_ctx **pipe_ctx,
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int num_pipes, int vmin, int vmax)
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{
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@ -1580,7 +1558,7 @@ static enum dc_status apply_ctx_to_hw_fpga(
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return DC_OK;
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}
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static void reset_hw_ctx_wrap(
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static void dce110_reset_hw_ctx_wrap(
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struct core_dc *dc,
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struct validate_context *context)
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{
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@ -1603,9 +1581,24 @@ static void reset_hw_ctx_wrap(
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continue;
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if (!pipe_ctx->stream ||
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pipe_need_reprogram(pipe_ctx_old, pipe_ctx))
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reset_single_pipe_hw_ctx(
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dc, pipe_ctx_old, dc->current_context);
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pipe_need_reprogram(pipe_ctx_old, pipe_ctx)) {
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core_link_disable_stream(pipe_ctx_old);
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pipe_ctx_old->tg->funcs->set_blank(pipe_ctx_old->tg, true);
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if (!hwss_wait_for_blank_complete(pipe_ctx_old->tg)) {
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dm_error("DC: failed to blank crtc!\n");
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BREAK_TO_DEBUGGER();
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}
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pipe_ctx_old->tg->funcs->disable_crtc(pipe_ctx_old->tg);
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pipe_ctx_old->mi->funcs->free_mem_input(
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pipe_ctx_old->mi, dc->current_context->stream_count);
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resource_unreference_clock_source(
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&dc->current_context->res_ctx, dc->res_pool,
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&pipe_ctx_old->clock_source);
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dc->hwss.power_down_front_end(dc, pipe_ctx_old->pipe_idx);
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pipe_ctx_old->stream = NULL;
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}
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}
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}
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@ -2619,7 +2612,7 @@ static const struct hw_sequencer_funcs dce110_funcs = {
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.set_drr = set_drr,
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.get_position = get_position,
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.set_static_screen_control = set_static_screen_control,
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.reset_hw_ctx_wrap = reset_hw_ctx_wrap,
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.reset_hw_ctx_wrap = dce110_reset_hw_ctx_wrap,
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.prog_pixclk_crtc_otg = dce110_prog_pixclk_crtc_otg,
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.setup_stereo = NULL,
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.set_avmute = dce110_set_avmute,
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