From 431368c2648b59e5485a1b5f1276a83d885fb44b Mon Sep 17 00:00:00 2001 From: Yongqiang Niu Date: Thu, 28 Jan 2021 19:23:07 +0800 Subject: [PATCH 01/16] arm64: dts: mt8183: rename rdma fifo size property name must include only lowercase and '-' Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183") Signed-off-by: Yongqiang Niu Signed-off-by: Hsin-Yi Wang Reviewed-by: Chun-Kuang Hu Reviewed-by: Enric Balletbo i Serra Link: https://lore.kernel.org/r/20210128112314.1304160-2-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 5b782a4769e7..6c84ccb709af 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1011,7 +1011,7 @@ rdma0: rdma@1400b000 { clocks = <&mmsys CLK_MM_DISP_RDMA0>; iommus = <&iommu M4U_PORT_DISP_RDMA0>; mediatek,larb = <&larb0>; - mediatek,rdma_fifo_size = <5120>; + mediatek,rdma-fifo-size = <5120>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>; }; @@ -1023,7 +1023,7 @@ rdma1: rdma@1400c000 { clocks = <&mmsys CLK_MM_DISP_RDMA1>; iommus = <&iommu M4U_PORT_DISP_RDMA1>; mediatek,larb = <&larb0>; - mediatek,rdma_fifo_size = <2048>; + mediatek,rdma-fifo-size = <2048>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>; }; From 9a2cb5eba7ad4fa7ccb3a4aa754f5263111e8f96 Mon Sep 17 00:00:00 2001 From: Yongqiang Niu Date: Thu, 28 Jan 2021 19:23:08 +0800 Subject: [PATCH 02/16] arm64: dts: mt8183: refine gamma compatible name mt8183 gamma is different with mt8173 remove mt8173 compatible name for mt8183 gamma Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183") Signed-off-by: Yongqiang Niu Signed-off-by: Hsin-Yi Wang Reviewed-by: Enric Balletbo i Serra Link: https://lore.kernel.org/r/20210128112314.1304160-3-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 6c84ccb709af..9c0073cfad45 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1055,8 +1055,7 @@ aal0: aal@14010000 { }; gamma0: gamma@14011000 { - compatible = "mediatek,mt8183-disp-gamma", - "mediatek,mt8173-disp-gamma"; + compatible = "mediatek,mt8183-disp-gamma"; reg = <0 0x14011000 0 0x1000>; interrupts = ; power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; From 2f99fb6e46b0e982bb6ab18b24a08fa318f740ea Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Wed, 13 Jan 2021 22:57:23 +0100 Subject: [PATCH 03/16] arm64: dts: mt8183: Add missing power-domain for pwm0 node The MT8183 display PWM device will not work until the associated power-domain is enabled. Add the power-domain reference to the node allows the display PWM driver to operate and the backlight turn on. Fixes: f15722c0fef0 ("arm64: dts: mt8183: Add pwm and backlight node") Signed-off-by: Enric Balletbo i Serra Reviewed-by: Hsin-Yi Wang Link: https://lore.kernel.org/r/20210113215723.71966-1-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 9c0073cfad45..64fbba76597c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -661,6 +661,7 @@ pwm0: pwm@1100e000 { compatible = "mediatek,mt8183-disp-pwm"; reg = <0 0x1100e000 0 0x1000>; interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; #pwm-cells = <2>; clocks = <&topckgen CLK_TOP_MUX_DISP_PWM>, <&infracfg CLK_INFRA_DISP_PWM>; From afca1c66fb3312ddf58b92dd24ac378d6d4f6079 Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Wed, 9 Dec 2020 13:03:20 +0100 Subject: [PATCH 04/16] arm64: dts: mediatek: mt8183: add pwm node MT8183 SoC has 4 PWMs. Add the pwm node in order to support them. Signed-off-by: Fabien Parent Link: https://lore.kernel.org/r/20201209120322.137610-1-fparent@baylibre.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 64fbba76597c..f4d0f5de99b9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -668,6 +668,20 @@ pwm0: pwm@1100e000 { clock-names = "main", "mm"; }; + pwm1: pwm@11006000 { + compatible = "mediatek,mt8183-pwm"; + reg = <0 0x11006000 0 0x1000>; + #pwm-cells = <2>; + clocks = <&infracfg CLK_INFRA_PWM>, + <&infracfg CLK_INFRA_PWM_HCLK>, + <&infracfg CLK_INFRA_PWM1>, + <&infracfg CLK_INFRA_PWM2>, + <&infracfg CLK_INFRA_PWM3>, + <&infracfg CLK_INFRA_PWM4>; + clock-names = "top", "main", "pwm1", "pwm2", "pwm3", + "pwm4"; + }; + i2c3: i2c@1100f000 { compatible = "mediatek,mt8183-i2c"; reg = <0 0x1100f000 0 0x1000>, From 06ec50ec0ee97911263d63b172d61dd97ac6c89b Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Wed, 9 Dec 2020 13:03:21 +0100 Subject: [PATCH 05/16] arm64: dts: mediatek: mt8183-evb: add PWM support Enable the pwm driver and set the pinctrl for PWM A line. Signed-off-by: Fabien Parent Link: https://lore.kernel.org/r/20201209120322.137610-2-fparent@baylibre.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts index cba2d8933e79..3249c959f76f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts @@ -344,6 +344,12 @@ pins_spi{ bias-disable; }; }; + + pwm_pins_1: pwm1 { + pins_pwm { + pinmux = ; + }; + }; }; &spi0 { @@ -392,3 +398,9 @@ &spi5 { &uart0 { status = "okay"; }; + +&pwm1 { + status = "okay"; + pinctrl-0 = <&pwm_pins_1>; + pinctrl-names = "default"; +}; From dbcd865bc7a8d06a844b6a607082b16251d42f70 Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Wed, 9 Dec 2020 12:47:36 +0100 Subject: [PATCH 06/16] arm64: dts: mediatek: mt8516: add support for APDMA Add support the APDMA IP on MT8516. APDMA is a DMA controller for UARTs. Signed-off-by: Fabien Parent Link: https://lore.kernel.org/r/20201209114736.70625-2-fparent@baylibre.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8516.dtsi | 30 ++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8516.dtsi b/arch/arm64/boot/dts/mediatek/mt8516.dtsi index e6e4d9d60094..b80e95574bef 100644 --- a/arch/arm64/boot/dts/mediatek/mt8516.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8516.dtsi @@ -276,6 +276,27 @@ gic: interrupt-controller@10310000 { (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; + apdma: dma-controller@11000480 { + compatible = "mediatek,mt8516-uart-dma", + "mediatek,mt6577-uart-dma"; + reg = <0 0x11000480 0 0x80>, + <0 0x11000500 0 0x80>, + <0 0x11000580 0 0x80>, + <0 0x11000600 0 0x80>, + <0 0x11000980 0 0x80>, + <0 0x11000a00 0 0x80>; + interrupts = , + , + , + , + , + ; + dma-requests = <6>; + clocks = <&topckgen CLK_TOP_APDMA>; + clock-names = "apdma"; + #dma-cells = <1>; + }; + uart0: serial@11005000 { compatible = "mediatek,mt8516-uart", "mediatek,mt6577-uart"; @@ -284,6 +305,9 @@ uart0: serial@11005000 { clocks = <&topckgen CLK_TOP_UART0_SEL>, <&topckgen CLK_TOP_UART0>; clock-names = "baud", "bus"; + dmas = <&apdma 0 + &apdma 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -295,6 +319,9 @@ uart1: serial@11006000 { clocks = <&topckgen CLK_TOP_UART1_SEL>, <&topckgen CLK_TOP_UART1>; clock-names = "baud", "bus"; + dmas = <&apdma 2 + &apdma 3>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -306,6 +333,9 @@ uart2: serial@11007000 { clocks = <&topckgen CLK_TOP_UART2_SEL>, <&topckgen CLK_TOP_UART2>; clock-names = "baud", "bus"; + dmas = <&apdma 4 + &apdma 5>; + dma-names = "tx", "rx"; status = "disabled"; }; From d0a197a0d064abe579e21300a7ee74e8dc331112 Mon Sep 17 00:00:00 2001 From: bayi cheng Date: Wed, 23 Dec 2020 12:22:59 +0800 Subject: [PATCH 07/16] arm64: dts: mt8192: add nor_flash device node add nor_flash device node Signed-off-by: bayi cheng Link: https://lore.kernel.org/r/1608697379-22025-1-git-send-email-bayi.cheng@mediatek.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index e12e024de122..751c877e082c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -379,6 +379,19 @@ spi7: spi@1101e000 { status = "disabled"; }; + nor_flash: spi@11234000 { + compatible = "mediatek,mt8192-nor"; + reg = <0 0x11234000 0 0xe0>; + interrupts = ; + clocks = <&clk26m>, + <&clk26m>, + <&clk26m>; + clock-names = "spi", "sf", "axi"; + #address-cells = <1>; + #size-cells = <0>; + status = "disable"; + }; + i2c3: i2c3@11cb0000 { compatible = "mediatek,mt8192-i2c"; reg = <0 0x11cb0000 0 0x1000>, From 9e1b7d00bbe1128813dc5bb95cf84c60cea0bb74 Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Fri, 29 Jan 2021 18:12:08 +0800 Subject: [PATCH 08/16] arm64: dts: mediatek: mt8183: Add domain supply for mfg Add domain supply node. Signed-off-by: Hsin-Yi Wang Link: https://lore.kernel.org/r/20210129101208.2625249-4-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 4 ++++ arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi index bf2ad1294dd3..ebd53755d538 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -709,6 +709,10 @@ cros_ec { }; }; +&mfg { + domain-supply = <&mt6358_vgpu_reg>; +}; + &soc_data { status = "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index f4d0f5de99b9..b3b8afec5ab9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -360,7 +360,7 @@ power-domain@MT8183_POWER_DOMAIN_MFG_ASYNC { #size-cells = <0>; #power-domain-cells = <1>; - power-domain@MT8183_POWER_DOMAIN_MFG { + mfg: power-domain@MT8183_POWER_DOMAIN_MFG { reg = ; #address-cells = <1>; #size-cells = <0>; From 9260918d3a4fae5a30061b08ba7b858ecebdbb34 Mon Sep 17 00:00:00 2001 From: James Liao Date: Tue, 22 Dec 2020 12:58:20 +0800 Subject: [PATCH 09/16] arm64: dts: mt8192: Add cpu-idle-states Add idle states for cpu-off and cluster-off. Signed-off-by: James Liao Link: https://lore.kernel.org/r/20201222045820.26355-1-jamesjj.liao@mediatek.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 44 ++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 751c877e082c..9757138a8bbd 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -39,6 +39,7 @@ cpu0: cpu@0 { reg = <0x000>; enable-method = "psci"; clock-frequency = <1701000000>; + cpu-idle-states = <&cpuoff_l &clusteroff_l>; next-level-cache = <&l2_0>; capacity-dmips-mhz = <530>; }; @@ -49,6 +50,7 @@ cpu1: cpu@100 { reg = <0x100>; enable-method = "psci"; clock-frequency = <1701000000>; + cpu-idle-states = <&cpuoff_l &clusteroff_l>; next-level-cache = <&l2_0>; capacity-dmips-mhz = <530>; }; @@ -59,6 +61,7 @@ cpu2: cpu@200 { reg = <0x200>; enable-method = "psci"; clock-frequency = <1701000000>; + cpu-idle-states = <&cpuoff_l &clusteroff_l>; next-level-cache = <&l2_0>; capacity-dmips-mhz = <530>; }; @@ -69,6 +72,7 @@ cpu3: cpu@300 { reg = <0x300>; enable-method = "psci"; clock-frequency = <1701000000>; + cpu-idle-states = <&cpuoff_l &clusteroff_l>; next-level-cache = <&l2_0>; capacity-dmips-mhz = <530>; }; @@ -79,6 +83,7 @@ cpu4: cpu@400 { reg = <0x400>; enable-method = "psci"; clock-frequency = <2171000000>; + cpu-idle-states = <&cpuoff_b &clusteroff_b>; next-level-cache = <&l2_1>; capacity-dmips-mhz = <1024>; }; @@ -89,6 +94,7 @@ cpu5: cpu@500 { reg = <0x500>; enable-method = "psci"; clock-frequency = <2171000000>; + cpu-idle-states = <&cpuoff_b &clusteroff_b>; next-level-cache = <&l2_1>; capacity-dmips-mhz = <1024>; }; @@ -99,6 +105,7 @@ cpu6: cpu@600 { reg = <0x600>; enable-method = "psci"; clock-frequency = <2171000000>; + cpu-idle-states = <&cpuoff_b &clusteroff_b>; next-level-cache = <&l2_1>; capacity-dmips-mhz = <1024>; }; @@ -109,6 +116,7 @@ cpu7: cpu@700 { reg = <0x700>; enable-method = "psci"; clock-frequency = <2171000000>; + cpu-idle-states = <&cpuoff_b &clusteroff_b>; next-level-cache = <&l2_1>; capacity-dmips-mhz = <1024>; }; @@ -158,6 +166,42 @@ l2_1: l2-cache1 { l3_0: l3-cache { compatible = "cache"; }; + + idle-states { + entry-method = "arm,psci"; + cpuoff_l: cpuoff_l { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x00010001>; + local-timer-stop; + entry-latency-us = <55>; + exit-latency-us = <140>; + min-residency-us = <780>; + }; + cpuoff_b: cpuoff_b { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x00010001>; + local-timer-stop; + entry-latency-us = <35>; + exit-latency-us = <145>; + min-residency-us = <720>; + }; + clusteroff_l: clusteroff_l { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x01010002>; + local-timer-stop; + entry-latency-us = <60>; + exit-latency-us = <155>; + min-residency-us = <860>; + }; + clusteroff_b: clusteroff_b { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x01010002>; + local-timer-stop; + entry-latency-us = <40>; + exit-latency-us = <155>; + min-residency-us = <780>; + }; + }; }; pmu-a55 { From 3960a7a25b5d243691e11f6bc8d2d339d5dafa5a Mon Sep 17 00:00:00 2001 From: Neal Liu Date: Wed, 23 Dec 2020 16:44:51 +0800 Subject: [PATCH 10/16] arm64: dts: mt6779: Support devapc Support DEVAPC on MT6779 platforms by adding device node. Signed-off-by: Neal Liu Reviewed-by: Hanks Chen Link: https://lore.kernel.org/r/1608713092-26952-2-git-send-email-neal.liu@mediatek.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt6779.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi b/arch/arm64/boot/dts/mediatek/mt6779.dtsi index 370f309d32de..52ecfc71a5f4 100644 --- a/arch/arm64/boot/dts/mediatek/mt6779.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6779.dtsi @@ -189,6 +189,14 @@ apmixed: clock-controller@1000c000 { #clock-cells = <1>; }; + devapc: devapc@10207000 { + compatible = "mediatek,mt6779-devapc"; + reg = <0 0x10207000 0 0x1000>; + interrupts = ; + clocks = <&infracfg_ao CLK_INFRA_DEVICE_APC>; + clock-names = "devapc-infra-clock"; + }; + uart0: serial@11002000 { compatible = "mediatek,mt6779-uart", "mediatek,mt6577-uart"; From b870c58582141130cc7067719546311255562e72 Mon Sep 17 00:00:00 2001 From: Argus Lin Date: Mon, 4 Jan 2021 16:08:22 +0800 Subject: [PATCH 11/16] arm64: dts: mt6779: Support pwrap on Mediatek MT6779 platform Support pwrap on Mediatek MT6779 platform by adding pwrap node in dts file. Signed-off-by: Argus Lin Link: https://lore.kernel.org/r/1609747703-27207-2-git-send-email-argus.lin@mediatek.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt6779.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi b/arch/arm64/boot/dts/mediatek/mt6779.dtsi index 52ecfc71a5f4..9bdf5145966c 100644 --- a/arch/arm64/boot/dts/mediatek/mt6779.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6779.dtsi @@ -189,6 +189,15 @@ apmixed: clock-controller@1000c000 { #clock-cells = <1>; }; + pwrap: pwrap@1000d000 { + compatible = "mediatek,mt6779-pwrap"; + reg = <0 0x1000d000 0 0x1000>; + reg-names = "pwrap"; + interrupts = ; + clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_PMIC_AP>; + clock-names = "spi", "wrap"; + }; + devapc: devapc@10207000 { compatible = "mediatek,mt6779-devapc"; reg = <0 0x10207000 0 0x1000>; From 27eaf34df36419ead90801ef1ba73db287944158 Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Wed, 13 Jan 2021 19:03:59 +0800 Subject: [PATCH 12/16] arm64: dts: mt8183: config dsi node Config dsi node for mt8183 kukui. Set panel and ports. Several kukui boards share the same panel property and only compatible is different. So compatible will be set in board dts for comparison convenience. Signed-off-by: Hsin-Yi Wang Tested-by: Enric Balletbo i Serra Reviewed-by: Nicolas Boichat Link: https://lore.kernel.org/r/20210113110400.616319-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- .../mediatek/mt8183-kukui-krane-sku176.dts | 5 +++ .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 42 +++++++++++++++++++ 2 files changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane-sku176.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane-sku176.dts index 47113e275cb5..721d16f9c3b4 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane-sku176.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane-sku176.dts @@ -16,3 +16,8 @@ / { model = "MediaTek krane sku176 board"; compatible = "google,krane-sku176", "google,krane", "mediatek,mt8183"; }; + +&panel { + status = "okay"; + compatible = "boe,tv101wum-nl6"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi index ebd53755d538..ff56bcfa3370 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -249,6 +249,36 @@ &cpu7 { proc-supply = <&mt6358_vproc11_reg>; }; +&dsi0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + panel: panel@0 { + /* compatible will be set in board dts */ + reg = <0>; + enable-gpios = <&pio 45 0>; + pinctrl-names = "default"; + pinctrl-0 = <&panel_pins_default>; + avdd-supply = <&ppvarn_lcd>; + avee-supply = <&ppvarp_lcd>; + pp1800-supply = <&pp1800_lcd>; + backlight = <&backlight_lcd0>; + port { + panel_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + }; + + ports { + port { + dsi_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; @@ -290,6 +320,10 @@ &i2c6 { clock-frequency = <100000>; }; +&mipi_tx0 { + status = "okay"; +}; + &mmc0 { status = "okay"; pinctrl-names = "default", "state_uhs"; @@ -547,6 +581,14 @@ pins_clk { }; }; + panel_pins_default: panel_pins_default { + panel_reset { + pinmux = ; + output-low; + bias-pull-up; + }; + }; + pwm0_pin_default: pwm0_pin_default { pins1 { pinmux = ; From 17cf7d4d940f4386e3b4d8e9db907887520d837a Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Wed, 13 Jan 2021 19:04:01 +0800 Subject: [PATCH 13/16] arm64: dts: mt8183: Add krane-sku0 board. Similar to krane-sku176 but using a different panel source. Signed-off-by: Hsin-Yi Wang Reviewed-by: Enric Balletbo i Serra Link: https://lore.kernel.org/r/20210113110400.616319-2-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/Makefile | 1 + .../dts/mediatek/mt8183-kukui-krane-sku0.dts | 23 +++++++++++++++++++ 2 files changed, 24 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-krane-sku0.dts diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile index 18f7b46c4095..deba27ab7657 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane-sku0.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane-sku0.dts new file mode 100644 index 000000000000..fb5ee91b6fe0 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane-sku0.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2019 Google LLC + * + * Device-tree for Krane sku0. + * + * SKU is a 8-bit value (0x00 == 0): + * - Bits 7..4: Panel ID: 0x0 (AUO) + * - Bits 3..0: SKU ID: 0x0 (default) + */ + +/dts-v1/; +#include "mt8183-kukui-krane.dtsi" + +/ { + model = "MediaTek krane sku0 board"; + compatible = "google,krane-sku0", "google,krane", "mediatek,mt8183"; +}; + +&panel { + status = "okay"; + compatible = "auo,kd101n80-45na"; +}; From f93b04efaf80fe3d8ea1776a71a9e8e7fb3cfeab Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Wed, 13 Jan 2021 19:04:03 +0800 Subject: [PATCH 14/16] dt-bindings: arm64: dts: mediatek: Add krane sku0 Krane-sku0 is similar to krane-sku176 but using a different panel source. Signed-off-by: Hsin-Yi Wang Reviewed-by: Rob Herring Reviewed-by: Enric Balletbo i Serra Link: https://lore.kernel.org/r/20210113110400.616319-3-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 53f0d4e3ea98..93b3bdf6eaeb 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -120,7 +120,9 @@ properties: - const: mediatek,mt8183 - description: Google Krane (Lenovo IdeaPad Duet, 10e,...) items: - - const: google,krane-sku176 + - enum: + - google,krane-sku0 + - google,krane-sku176 - const: google,krane - const: mediatek,mt8183 From dc2e76175417e69c41d927dba75a966399f18354 Mon Sep 17 00:00:00 2001 From: Frank Wunderlich Date: Wed, 13 Jan 2021 19:09:19 +0100 Subject: [PATCH 15/16] dts64: mt7622: fix slow sd card access Fix extreme slow speed (200MB takes ~20 min) on writing sdcard on bananapi-r64 by adding reset-control for mmc1 like it's done for mmc0/emmc. Fixes: 2c002a3049f7 ("arm64: dts: mt7622: add mmc related device nodes") Signed-off-by: Frank Wunderlich Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20210113180919.49523-1-linux@fw-web.de Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi index 5b9ec032ce8d..7c6d871538a6 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -698,6 +698,8 @@ mmc1: mmc@11240000 { clocks = <&pericfg CLK_PERI_MSDC30_1_PD>, <&topckgen CLK_TOP_AXI_SEL>; clock-names = "source", "hclk"; + resets = <&pericfg MT7622_PERI_MSDC1_SW_RST>; + reset-names = "hrst"; status = "disabled"; }; From 18d6e3f6744d6105ab61de790170cb60534eeebc Mon Sep 17 00:00:00 2001 From: Matthias Brugger Date: Sun, 31 Jan 2021 11:17:26 +0100 Subject: [PATCH 16/16] arm64: dts: mt8183: Fix GCE include path The header file of GCE should be for MT8183 SoC instead of MT8173. Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183") Reported-by: CK Hu Signed-off-by: Matthias Brugger Reviewed-by: Chun-Kuang Hu Link: https://lore.kernel.org/r/20210131101726.804-1-matthias.bgg@kernel.org Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index b3b8afec5ab9..80519a145f13 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -6,7 +6,7 @@ */ #include -#include +#include #include #include #include