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ARM: dts: sti: adjust whitespace around '='
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20220526203632.831039-1-krzysztof.kozlowski@linaro.org
This commit is contained in:
Krzysztof Kozlowski
parent
282a4b9ee9
commit
53f2ade4b0
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@ -137,8 +137,8 @@ picophyreset: picophyreset-controller {
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};
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irq-syscfg {
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compatible = "st,stih407-irq-syscfg";
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st,syscfg = <&syscfg_core>;
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compatible = "st,stih407-irq-syscfg";
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st,syscfg = <&syscfg_core>;
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st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
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<ST_IRQ_SYSCFG_PMU_1>;
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st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
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@ -157,8 +157,8 @@ usb2_picophy0: phy1 {
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miphy28lp_phy: miphy28lp {
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compatible = "st,miphy28lp-phy";
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st,syscfg = <&syscfg_core>;
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#address-cells = <1>;
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#size-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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phy_port0: port@9b22000 {
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@ -208,26 +208,26 @@ phy_port2: port@8f95000 {
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};
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st231_gp0: st231-gp0 {
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compatible = "st,st231-rproc";
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memory-region = <&gp0_reserved>;
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resets = <&softreset STIH407_ST231_GP0_SOFTRESET>;
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reset-names = "sw_reset";
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clocks = <&clk_s_c0_flexgen CLK_ST231_GP_0>;
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clock-frequency = <600000000>;
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st,syscfg = <&syscfg_core 0x22c>;
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compatible = "st,st231-rproc";
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memory-region = <&gp0_reserved>;
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resets = <&softreset STIH407_ST231_GP0_SOFTRESET>;
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reset-names = "sw_reset";
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clocks = <&clk_s_c0_flexgen CLK_ST231_GP_0>;
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clock-frequency = <600000000>;
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st,syscfg = <&syscfg_core 0x22c>;
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#mbox-cells = <1>;
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mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx";
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mboxes = <&mailbox0 0 2>, <&mailbox2 0 1>, <&mailbox0 0 3>, <&mailbox2 0 0>;
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};
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st231_delta: st231-delta {
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compatible = "st,st231-rproc";
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memory-region = <&delta_reserved>;
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resets = <&softreset STIH407_ST231_DMU_SOFTRESET>;
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reset-names = "sw_reset";
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clocks = <&clk_s_c0_flexgen CLK_ST231_DMU>;
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clock-frequency = <600000000>;
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st,syscfg = <&syscfg_core 0x224>;
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compatible = "st,st231-rproc";
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memory-region = <&delta_reserved>;
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resets = <&softreset STIH407_ST231_DMU_SOFTRESET>;
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reset-names = "sw_reset";
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clocks = <&clk_s_c0_flexgen CLK_ST231_DMU>;
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clock-frequency = <600000000>;
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st,syscfg = <&syscfg_core 0x224>;
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#mbox-cells = <1>;
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mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx";
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mboxes = <&mailbox0 0 0>, <&mailbox3 0 1>, <&mailbox0 0 1>, <&mailbox3 0 0>;
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@ -710,78 +710,78 @@ sata1: sata@9b28000 {
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st_dwc3: dwc3@8f94000 {
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compatible = "st,stih407-dwc3";
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reg = <0x08f94000 0x1000>, <0x110 0x4>;
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reg-names = "reg-glue", "syscfg-reg";
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st,syscfg = <&syscfg_core>;
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resets = <&powerdown STIH407_USB3_POWERDOWN>,
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<&softreset STIH407_MIPHY2_SOFTRESET>;
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reset-names = "powerdown", "softreset";
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#address-cells = <1>;
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#size-cells = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb3>;
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compatible = "st,stih407-dwc3";
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reg = <0x08f94000 0x1000>, <0x110 0x4>;
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reg-names = "reg-glue", "syscfg-reg";
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st,syscfg = <&syscfg_core>;
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resets = <&powerdown STIH407_USB3_POWERDOWN>,
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<&softreset STIH407_MIPHY2_SOFTRESET>;
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reset-names = "powerdown", "softreset";
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#address-cells = <1>;
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#size-cells = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb3>;
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ranges;
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status = "disabled";
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dwc3: dwc3@9900000 {
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compatible = "snps,dwc3";
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reg = <0x09900000 0x100000>;
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interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
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dr_mode = "host";
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phy-names = "usb2-phy", "usb3-phy";
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phys = <&usb2_picophy0>,
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<&phy_port2 PHY_TYPE_USB3>;
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compatible = "snps,dwc3";
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reg = <0x09900000 0x100000>;
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interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
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dr_mode = "host";
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phy-names = "usb2-phy", "usb3-phy";
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phys = <&usb2_picophy0>,
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<&phy_port2 PHY_TYPE_USB3>;
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snps,dis_u3_susphy_quirk;
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};
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};
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/* COMMS PWM Module */
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pwm0: pwm@9810000 {
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compatible = "st,sti-pwm";
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#pwm-cells = <2>;
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reg = <0x9810000 0x68>;
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interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm0_chan0_default>;
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clock-names = "pwm";
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clocks = <&clk_sysin>;
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compatible = "st,sti-pwm";
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#pwm-cells = <2>;
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reg = <0x9810000 0x68>;
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interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm0_chan0_default>;
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clock-names = "pwm";
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clocks = <&clk_sysin>;
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st,pwm-num-chan = <1>;
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status = "disabled";
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status = "disabled";
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};
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/* SBC PWM Module */
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pwm1: pwm@9510000 {
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compatible = "st,sti-pwm";
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#pwm-cells = <2>;
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reg = <0x9510000 0x68>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm1_chan0_default
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&pinctrl_pwm1_chan1_default
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&pinctrl_pwm1_chan2_default
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&pinctrl_pwm1_chan3_default>;
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clock-names = "pwm";
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clocks = <&clk_sysin>;
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compatible = "st,sti-pwm";
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#pwm-cells = <2>;
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reg = <0x9510000 0x68>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm1_chan0_default
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&pinctrl_pwm1_chan1_default
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&pinctrl_pwm1_chan2_default
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&pinctrl_pwm1_chan3_default>;
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clock-names = "pwm";
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clocks = <&clk_sysin>;
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st,pwm-num-chan = <4>;
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status = "disabled";
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status = "disabled";
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};
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rng10: rng@8a89000 {
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compatible = "st,rng";
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reg = <0x08a89000 0x1000>;
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clocks = <&clk_sysin>;
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status = "okay";
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compatible = "st,rng";
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reg = <0x08a89000 0x1000>;
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clocks = <&clk_sysin>;
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status = "okay";
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};
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rng11: rng@8a8a000 {
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compatible = "st,rng";
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reg = <0x08a8a000 0x1000>;
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clocks = <&clk_sysin>;
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status = "okay";
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compatible = "st,rng";
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reg = <0x08a8a000 0x1000>;
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clocks = <&clk_sysin>;
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status = "okay";
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};
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ethernet0: dwmac@9630000 {
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@ -812,36 +812,36 @@ ethernet0: dwmac@9630000 {
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};
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mailbox0: mailbox@8f00000 {
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compatible = "st,stih407-mailbox";
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reg = <0x8f00000 0x1000>;
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interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <2>;
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mbox-name = "a9";
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status = "okay";
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compatible = "st,stih407-mailbox";
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reg = <0x8f00000 0x1000>;
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interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <2>;
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mbox-name = "a9";
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status = "okay";
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};
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mailbox1: mailbox@8f01000 {
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compatible = "st,stih407-mailbox";
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reg = <0x8f01000 0x1000>;
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#mbox-cells = <2>;
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mbox-name = "st231_gp_1";
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status = "okay";
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compatible = "st,stih407-mailbox";
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reg = <0x8f01000 0x1000>;
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#mbox-cells = <2>;
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mbox-name = "st231_gp_1";
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status = "okay";
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};
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mailbox2: mailbox@8f02000 {
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compatible = "st,stih407-mailbox";
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reg = <0x8f02000 0x1000>;
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#mbox-cells = <2>;
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mbox-name = "st231_gp_0";
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status = "okay";
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compatible = "st,stih407-mailbox";
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reg = <0x8f02000 0x1000>;
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#mbox-cells = <2>;
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mbox-name = "st231_gp_0";
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status = "okay";
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};
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mailbox3: mailbox@8f03000 {
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compatible = "st,stih407-mailbox";
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reg = <0x8f03000 0x1000>;
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#mbox-cells = <2>;
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mbox-name = "st231_audio_video";
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status = "okay";
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compatible = "st,stih407-mailbox";
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reg = <0x8f03000 0x1000>;
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#mbox-cells = <2>;
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mbox-name = "st231_audio_video";
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status = "okay";
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};
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/* fdma audio */
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@ -913,7 +913,7 @@ sti_uni_player0: sti-uni-player@8d80000 {
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dmas = <&fdma0 2 0 1>;
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dma-names = "tx";
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status = "disabled";
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status = "disabled";
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};
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sti_uni_player1: sti-uni-player@8d81000 {
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@ -13,7 +13,7 @@ sti-display-subsystem@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0 0>;
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assigned-clocks = <&clk_s_d2_quadfs 0>,
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assigned-clocks = <&clk_s_d2_quadfs 0>,
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<&clk_s_d2_quadfs 1>,
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<&clk_s_c0_pll1 0>,
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<&clk_s_c0_flexgen CLK_COMPO_DVP>,
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@ -106,7 +106,7 @@ sti_hdmi: sti-hdmi@8d04000 {
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reg-names = "hdmi-reg";
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#sound-dai-cells = <0>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "irq";
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interrupt-names = "irq";
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clock-names = "pix",
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"tmds",
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"phy",
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@ -105,7 +105,7 @@ sti-display-subsystem@0 {
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#size-cells = <1>;
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reg = <0 0>;
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assigned-clocks = <&clk_s_d2_quadfs 0>,
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assigned-clocks = <&clk_s_d2_quadfs 0>,
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<&clk_s_d2_quadfs 1>,
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<&clk_s_c0_pll1 0>,
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<&clk_s_c0_flexgen CLK_COMPO_DVP>,
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@ -198,7 +198,7 @@ sti_hdmi: sti-hdmi@8d04000 {
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reg-names = "hdmi-reg";
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#sound-dai-cells = <0>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "irq";
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interrupt-names = "irq";
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clock-names = "pix",
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"tmds",
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"phy",
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@ -175,11 +175,11 @@ demux@8a20000 {
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/* tsin0 is TSA on NIMA */
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tsin0: port {
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tsin-num = <0>;
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tsin-num = <0>;
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serial-not-parallel;
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i2c-bus = <&ssc2>;
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reset-gpios = <&pio15 4 GPIO_ACTIVE_HIGH>;
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dvb-card = <STV0367_TDA18212_NIMA_1>;
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i2c-bus = <&ssc2>;
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reset-gpios = <&pio15 4 GPIO_ACTIVE_HIGH>;
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dvb-card = <STV0367_TDA18212_NIMA_1>;
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};
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};
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