rockchip: clk: rk3399: default enable dual pll for vop

Change-Id: I88a2a549eaafa91e4159f262a5f5838c834a89e9
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
This commit is contained in:
Mark Yao 2017-02-21 09:04:04 +08:00 committed by Huang, Tao
parent bb3fdd8743
commit 5334ebb963

View File

@ -16,7 +16,7 @@
#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
#define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
/* #define RK3399_TWO_PLL_FOR_VOP */
#define RK3399_TWO_PLL_FOR_VOP
/* core clocks */
#define PLL_APLLL 1