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arm64: cpufeature: Add support for the MPAM v0.1 architecture version
According to the MPAM spec [1], the supported architecture versions are
v1.0, v1.1 and v0.1. MPAM versions v0.1 and v1.1 are functionally
identical, but v0.1 additionally supports the FORCE_NS feature.
ID_AA64PR | ID_AA64PR | MPAM Extension | Notes
F0_EL1. | F1_EL1. | Architecture |
MPAM | MPAM_frac | version |
---------------------------------------------------------------------------
0b0000 | 0b0001 | v0.1 | MPAM v0.1 is implemented.
| | | MPAM v0.1 is the same as MPAM v1.1
| | | with FORCE_NS which is
| | | incompatible with MPAM v1.0.
---------------------------------------------------------------------------
0b0001 | 0b0000 | v1.0 | MPAM v1.0 is implemented.
---------------------------------------------------------------------------
0b0001 | 0b0001 | v1.1 | MPAM v1.1 is implemented.
| | | MPAM v1.1 includes all features of
| | | MPAM v1.0.
| | | It must not include FORCE_NS.
FORCE_NS is a feature that operates in EL3 mode. Consequently, the current
Linux MPAM driver is also compatible with MPAM v0.1. To support v0.1, the
existing driver which only checks ID_AA64PFR0_EL1.MPAM for the major
version needs to examine ID_AA64PFR1_EL1.MPAM_frac for the minor version
as well.
[1] https://developer.arm.com/documentation/ddi0598/db/?lang=en
Signed-off-by: Zeng Heng <zengheng4@huawei.com>
Reviewed-by: James Morse <james.morse@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
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254f49634e
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@ -620,6 +620,13 @@ static inline bool id_aa64pfr0_mpam(u64 pfr0)
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return val > 0;
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}
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static inline bool id_aa64pfr1_mpamfrac(u64 pfr1)
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{
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u32 val = cpuid_feature_extract_unsigned_field(pfr1, ID_AA64PFR1_EL1_MPAM_frac_SHIFT);
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return val > 0;
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}
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static inline bool id_aa64pfr1_mte(u64 pfr1)
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{
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u32 val = cpuid_feature_extract_unsigned_field(pfr1, ID_AA64PFR1_EL1_MTE_SHIFT);
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@ -510,7 +510,9 @@
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#endif
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.macro finalise_el2_state
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check_override id_aa64pfr0, ID_AA64PFR0_EL1_MPAM_SHIFT, .Linit_mpam_\@, .Lskip_mpam_\@, x1, x2
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check_override id_aa64pfr0, ID_AA64PFR0_EL1_MPAM_SHIFT, .Linit_mpam_\@, .Lmpam_minor_\@, x1, x2
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.Lmpam_minor_\@:
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check_override id_aa64pfr1, ID_AA64PFR1_EL1_MPAM_frac_SHIFT, .Linit_mpam_\@, .Lskip_mpam_\@, x1, x2
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.Linit_mpam_\@:
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mov x0, #MPAM2_EL2_EnMPAMSM_MASK
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@ -1164,6 +1164,14 @@ static __init void detect_system_supports_pseudo_nmi(void)
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static inline void detect_system_supports_pseudo_nmi(void) { }
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#endif
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static bool detect_ftr_has_mpam(void)
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{
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u64 pfr0 = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1);
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u64 pfr1 = read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1);
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return id_aa64pfr0_mpam(pfr0) || id_aa64pfr1_mpamfrac(pfr1);
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}
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void __init init_cpu_features(struct cpuinfo_arm64 *info)
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{
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/* Before we start using the tables, make sure it is sorted */
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@ -1211,7 +1219,7 @@ void __init init_cpu_features(struct cpuinfo_arm64 *info)
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cpacr_restore(cpacr);
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}
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if (id_aa64pfr0_mpam(read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1))) {
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if (detect_ftr_has_mpam()) {
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info->reg_mpamidr = read_cpuid(MPAMIDR_EL1);
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init_cpu_ftr_reg(SYS_MPAMIDR_EL1, info->reg_mpamidr);
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}
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@ -1467,7 +1475,7 @@ void update_cpu_features(int cpu,
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cpacr_restore(cpacr);
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}
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if (id_aa64pfr0_mpam(read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1))) {
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if (detect_ftr_has_mpam()) {
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info->reg_mpamidr = read_cpuid(MPAMIDR_EL1);
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taint |= check_update_ftr_reg(SYS_MPAMIDR_EL1, cpu,
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info->reg_mpamidr, boot->reg_mpamidr);
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@ -2486,7 +2494,7 @@ cpucap_panic_on_conflict(const struct arm64_cpu_capabilities *cap)
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static bool
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test_has_mpam(const struct arm64_cpu_capabilities *entry, int scope)
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{
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if (!has_cpuid_feature(entry, scope))
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if (!detect_ftr_has_mpam())
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return false;
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/* Check firmware actually enabled MPAM on this cpu. */
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@ -3093,7 +3101,6 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
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.capability = ARM64_MPAM,
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.matches = test_has_mpam,
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.cpu_enable = cpu_enable_mpam,
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ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, MPAM, 1)
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},
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{
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.desc = "Memory Partitioning And Monitoring Virtualisation",
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