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drm/amd/display: Refactor amdgpu_dm_initialize_default_pipeline

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[Why & How]
Extract amdgpu_dm_initialize_default_pipeline() into a new
STATIC_IFN_KUNIT helper amdgpu_dm_build_default_pipeline().

This separation makes the pipeline-building logic testable via
KUnit without pulling in amdgpu_device and its dependencies
that are unavailable in the UML KUnit build environment.

Assisted-by: Copilot:Claude-Sonnet-4.6
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Hung 2026-05-14 16:59:09 -06:00 committed by Alex Deucher
parent b640830f1a
commit 52c2bc3097
2 changed files with 21 additions and 6 deletions
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22
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c
View File

@ -63,12 +63,11 @@ static const struct drm_colorop_funcs dm_colorop_funcs = {
.destroy = drm_colorop_destroy,
};
int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list)
STATIC_IFN_KUNIT int
amdgpu_dm_build_default_pipeline(struct drm_device *dev, struct drm_plane *plane,
bool hw_3d_lut, struct drm_prop_enum_list *list)
{
struct drm_colorop *ops[MAX_COLOR_PIPELINE_OPS];
struct drm_device *dev = plane->dev;
struct amdgpu_device *adev = drm_to_adev(dev);
bool has_3dlut = adev->dm.dc->caps.color.dpp.hw_3d_lut || adev->dm.dc->caps.color.mpc.preblend;
int ret;
int i = 0;
@ -124,7 +123,7 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr
i++;
if (has_3dlut) {
if (hw_3d_lut) {
/* 1D curve - SHAPER TF */
ops[i] = kzalloc_obj(*ops[0]);
if (!ops[i]) {
@ -219,9 +218,20 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr
cleanup:
if (ret == -ENOMEM)
drm_err(plane->dev, "KMS: Failed to allocate colorop\n");
drm_err(dev, "KMS: Failed to allocate colorop\n");
drm_colorop_pipeline_destroy(dev);
return ret;
}
EXPORT_IF_KUNIT(amdgpu_dm_build_default_pipeline);
int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list)
{
struct drm_device *dev = plane->dev;
struct amdgpu_device *adev = drm_to_adev(dev);
bool hw_3d_lut = adev->dm.dc->caps.color.dpp.hw_3d_lut ||
adev->dm.dc->caps.color.mpc.preblend;
return amdgpu_dm_build_default_pipeline(dev, plane, hw_3d_lut, list);
}

5
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h
View File

@ -33,4 +33,9 @@ extern const u64 amdgpu_dm_supported_blnd_tfs;
int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list);
#if IS_ENABLED(CONFIG_DRM_AMD_DC_KUNIT_TEST)
int amdgpu_dm_build_default_pipeline(struct drm_device *dev, struct drm_plane *plane,
bool hw_3d_lut, struct drm_prop_enum_list *list);
#endif
#endif /* __AMDGPU_DM_COLOROP_H__*/