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drm/radeon/kms: evergreen & ni reset SPI block on CP resume

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commit a49a50dad4 upstream.

For some reason SPI block is in broken state after module
unloading. This lead to broken rendering after reloading
module. Fix this by reseting SPI block in CP resume function

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Jerome Glisse 2011-08-24 20:00:17 +00:00 committed by Greg Kroah-Hartman
parent 795464a57a
commit 5297aef4dd
2 changed files with 2 additions and 0 deletions
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1
drivers/gpu/drm/radeon/evergreen.c
View File

@ -1357,6 +1357,7 @@ int evergreen_cp_resume(struct radeon_device *rdev)
SOFT_RESET_PA |
SOFT_RESET_SH |
SOFT_RESET_VGT |
SOFT_RESET_SPI |
SOFT_RESET_SX));
RREG32(GRBM_SOFT_RESET);
mdelay(15);

1
drivers/gpu/drm/radeon/ni.c
View File

@ -1158,6 +1158,7 @@ int cayman_cp_resume(struct radeon_device *rdev)
SOFT_RESET_PA |
SOFT_RESET_SH |
SOFT_RESET_VGT |
SOFT_RESET_SPI |
SOFT_RESET_SX));
RREG32(GRBM_SOFT_RESET);
mdelay(15);