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arm64: dts: qcom: Add Monaco Monza SoM
The Monaco Monza SoM is a compact computing module that integrates a Monaco/QCS8300 System on Chip (SoC), along with essential components optimized for IoT applications. It is designed to be mounted on carrier boards, enabling the development of complete embedded systems. The following components are described: - Fixed S2S 1.8V rail - PMM8654AU RPMh regulators (PMIC A and PMIC C) - Display subsystem/phy supplies (DSI, DP) - Enable GPU, GPI DMA, IRIS - PCIe Gen4 for both controllers and PHY supply hookups - QUPv3 firmware declarations - REFGEN always-on workaround for USB2 HS PHY - Remoteproc firmware names for ADSP, CDSP and GPDSP - Ethernet SERDES supplies - USB HS/SS PHY regulators - On-SoM eMMC Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Co-developed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260313103824.2634519-5-srinivas.kandagatla@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Loic Poulain
Bjorn Andersson
parent
faf08fd434
commit
5238f4e716
323
arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
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323
arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
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@ -0,0 +1,323 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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*/
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#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
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#include "monaco.dtsi"
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#include "monaco-pmics.dtsi"
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/ {
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/* This comes from a PMIC handled within the SAIL domain */
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vreg_s2s: vreg-s2s {
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compatible = "regulator-fixed";
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regulator-name = "vreg_s2s";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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&apps_rsc {
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regulators-0 {
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compatible = "qcom,pmm8654au-rpmh-regulators";
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qcom,pmic-id = "a";
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vreg_l3a: ldo3 {
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regulator-name = "vreg_l3a";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
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regulator-always-on;
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};
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vreg_l4a: ldo4 {
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regulator-name = "vreg_l4a";
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regulator-min-microvolt = <880000>;
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regulator-max-microvolt = <912000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l5a: ldo5 {
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regulator-name = "vreg_l5a";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l6a: ldo6 {
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regulator-name = "vreg_l6a";
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regulator-min-microvolt = <880000>;
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regulator-max-microvolt = <912000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l7a: ldo7 {
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regulator-name = "vreg_l7a";
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regulator-min-microvolt = <880000>;
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regulator-max-microvolt = <912000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l8a: ldo8 {
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regulator-name = "vreg_l8a";
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regulator-min-microvolt = <2504000>;
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regulator-max-microvolt = <2960000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l9a: ldo9 {
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regulator-name = "vreg_l9a";
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regulator-min-microvolt = <2970000>;
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regulator-max-microvolt = <3072000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
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};
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};
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regulators-1 {
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compatible = "qcom,pmm8654au-rpmh-regulators";
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qcom,pmic-id = "c";
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vreg_s5c: smps5 { /* LPDDR VDD2H */
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regulator-name = "vreg_s5c";
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regulator-min-microvolt = <1104000>;
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regulator-max-microvolt = <1104000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l1c: ldo1 { /* LPDDR VDDQ */
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regulator-name = "vreg_l1c";
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <512000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l2c: ldo2 { /* LPDDR VDD2L */
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regulator-name = "vreg_l2c";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <904000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l4c: ldo4 {
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regulator-name = "vreg_l4c";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l7c: ldo7 {
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regulator-name = "vreg_l7c";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l8c: ldo8 { /* LPDDR VDD1 */
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regulator-name = "vreg_l8c";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l9c: ldo9 { /* QFPROM */
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regulator-name = "vreg_l9c";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
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};
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};
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};
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&mdss_dp0 {
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pinctrl-0 = <&dp_hpd>;
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pinctrl-names = "default";
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};
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&mdss_dp0_phy {
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vdda-phy-supply = <&vreg_l5a>;
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vdda-pll-supply = <&vreg_l4a>;
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};
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&mdss_dsi0 {
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vdda-supply = <&vreg_l5a>;
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};
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&mdss_dsi0_phy {
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vdds-supply = <&vreg_l4a>;
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};
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&gpi_dma0 {
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status = "okay";
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};
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&gpi_dma1 {
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status = "okay";
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};
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&gpu {
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status = "okay";
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};
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&gpu_zap_shader {
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firmware-name = "qcom/qcs8300/a623_zap.mbn";
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};
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&iris {
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status = "okay";
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};
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/* PCIe0 Gen4 x2 */
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&pcie0 {
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iommu-map = <0x0 &pcie_smmu 0x0000 0x1>,
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<0x100 &pcie_smmu 0x0001 0x1>,
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<0x200 &pcie_smmu 0x0007 0x1>,
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<0x208 &pcie_smmu 0x0002 0x1>,
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<0x210 &pcie_smmu 0x0003 0x1>,
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<0x218 &pcie_smmu 0x0004 0x1>,
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<0x300 &pcie_smmu 0x0005 0x1>,
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<0x400 &pcie_smmu 0x0006 0x1>;
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status = "okay";
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};
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&pcie0_phy {
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vdda-phy-supply = <&vreg_l6a>;
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vdda-pll-supply = <&vreg_l5a>;
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status = "okay";
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};
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/* PCIe1 Gen4 x4 */
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&pcie1 {
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status = "okay";
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};
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&pcie1_phy {
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vdda-phy-supply = <&vreg_l6a>;
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vdda-pll-supply = <&vreg_l5a>;
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status = "okay";
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};
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&qupv3_id_0 {
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firmware-name = "qcom/qcs8300/qupv3fw.elf";
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status = "okay";
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};
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&qupv3_id_1 {
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firmware-name = "qcom/qcs8300/qupv3fw.elf";
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status = "okay";
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};
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/* There is a HW/FW issue preventing proper REFGEN hardware voting
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* for the USB2 HS PHY. As a workaround, we force REFGEN to stay
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* always‑on in software, matching initial bootloader config.
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*/
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&refgen {
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regulator-always-on;
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};
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&remoteproc_adsp {
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firmware-name = "qcom/qcs8300/adsp.mbn";
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status = "okay";
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};
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&remoteproc_cdsp {
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firmware-name = "qcom/qcs8300/cdsp0.mbn";
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status = "okay";
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};
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&remoteproc_gpdsp {
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firmware-name = "qcom/qcs8300/gpdsp0.mbn";
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status = "okay";
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};
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/* OnSom eMMC */
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&sdhc_1 {
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vmmc-supply = <&vreg_l8a>;
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vqmmc-supply = <&vreg_s2s>;
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bus-width = <8>;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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mmc-hs400-enhanced-strobe;
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no-sd;
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no-sdio;
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non-removable;
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status = "okay";
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};
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/* Ethernet/SGMII */
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&serdes0 {
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phy-supply = <&vreg_l5a>;
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status = "okay";
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};
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&tlmm {
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dp_hpd: dp-hpd-state {
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pins = "gpio94";
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function = "edp0_hot";
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bias-disable;
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};
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};
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/* USB0 HS + SS */
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&usb_1_hsphy {
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vdda-pll-supply = <&vreg_l7a>;
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vdda18-supply = <&vreg_l7c>;
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vdda33-supply = <&vreg_l9a>;
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status = "okay";
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};
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&usb_qmpphy {
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vdda-phy-supply = <&vreg_l7a>;
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vdda-pll-supply = <&vreg_l5a>;
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status = "okay";
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};
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/* USB1 HS */
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&usb_2_hsphy {
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vdda-pll-supply = <&vreg_l7a>;
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vdda18-supply = <&vreg_l7c>;
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vdda33-supply = <&vreg_l9a>;
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status = "okay";
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};
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