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arm64: dts: renesas: r8a779f0: Add UFS node
Add UFS node for R-Car S4-8 (r8a779f0). Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20220603110524.1997825-7-yoshihiro.shimoda.uh@renesas.com [geert: Move ufs30-clk to preserve sort order] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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3a9747f051
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@ -271,6 +271,18 @@ i2c5: i2c@e66e0000 {
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status = "disabled";
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status = "disabled";
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};
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};
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ufs: ufs@e6860000 {
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compatible = "renesas,r8a779f0-ufs";
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reg = <0 0xe6860000 0 0x100>;
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interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>;
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clock-names = "fck", "ref_clk";
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freq-table-hz = <200000000 200000000>, <38400000 38400000>;
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power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
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resets = <&cpg 1514>;
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status = "disabled";
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};
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scif3: serial@e6c50000 {
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scif3: serial@e6c50000 {
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compatible = "renesas,scif-r8a779f0",
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compatible = "renesas,scif-r8a779f0",
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"renesas,rcar-gen4-scif", "renesas,scif";
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"renesas,rcar-gen4-scif", "renesas,scif";
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@ -485,4 +497,11 @@ timer {
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<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
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<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
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<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
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<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
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};
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};
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ufs30_clk: ufs30-clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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/* This value must be overridden by the board */
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clock-frequency = <0>;
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};
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};
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};
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