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arm64: dts: qcom: ipq9574: Use assigned-clock-rates for QUP I2C core clks

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Use assigned-clock-rates property for configuring the QUP I2C core clocks
to operate at nominal frequency.

Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Link: https://lore.kernel.org/r/20230615084841.12375-1-quic_devipriy@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Devi Priya 2023-06-15 14:18:41 +05:30 committed by Bjorn Andersson
parent 507f9db1e9
commit 5229c1d6a0
1 changed files with 8 additions and 0 deletions
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8
arch/arm64/boot/dts/qcom/ipq9574.dtsi
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@ -410,6 +410,8 @@ blsp1_i2c1: i2c@78b6000 {
clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
assigned-clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
assigned-clock-rates = <50000000>;
dmas = <&blsp_dma 14>, <&blsp_dma 15>;
dma-names = "tx", "rx";
status = "disabled";
@ -438,6 +440,8 @@ blsp1_i2c2: i2c@78b7000 {
clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
assigned-clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
assigned-clock-rates = <50000000>;
dmas = <&blsp_dma 16>, <&blsp_dma 17>;
dma-names = "tx", "rx";
status = "disabled";
@ -466,6 +470,8 @@ blsp1_i2c3: i2c@78b8000 {
clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
assigned-clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
assigned-clock-rates = <50000000>;
dmas = <&blsp_dma 18>, <&blsp_dma 19>;
dma-names = "tx", "rx";
status = "disabled";
@ -495,6 +501,8 @@ blsp1_i2c4: i2c@78b9000 {
clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
assigned-clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
assigned-clock-rates = <50000000>;
dmas = <&blsp_dma 20>, <&blsp_dma 21>;
dma-names = "tx", "rx";
status = "disabled";