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arm64: dts: qcom: sm8350: finish reordering nodes
Finish reordering DT nodes by their address. Move PDC, tsens, AOSS, SRAM, SPMI and TLMM nodes to the proper position. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230209133839.762631-5-dmitry.baryshkov@linaro.org
This commit is contained in:
Dmitry Baryshkov
Bjorn Andersson
parent
1417372f4f
commit
51f83fbbf1
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@ -1882,276 +1882,6 @@ compute-cb@3 {
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};
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};
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pdc: interrupt-controller@b220000 {
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compatible = "qcom,sm8350-pdc", "qcom,pdc";
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reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
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qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>,
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<59 312 3>, <62 374 2>, <64 434 2>, <66 438 3>,
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<69 86 1>, <70 520 54>, <124 609 31>, <155 63 1>,
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<156 716 12>;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupt-controller;
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};
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tsens0: thermal-sensor@c263000 {
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compatible = "qcom,sm8350-tsens", "qcom,tsens-v2";
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reg = <0 0x0c263000 0 0x1ff>, /* TM */
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<0 0x0c222000 0 0x8>; /* SROT */
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#qcom,sensors = <15>;
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interrupts-extended = <&pdc 26 IRQ_TYPE_LEVEL_HIGH>,
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<&pdc 28 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "uplow", "critical";
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#thermal-sensor-cells = <1>;
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};
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tsens1: thermal-sensor@c265000 {
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compatible = "qcom,sm8350-tsens", "qcom,tsens-v2";
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reg = <0 0x0c265000 0 0x1ff>, /* TM */
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<0 0x0c223000 0 0x8>; /* SROT */
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#qcom,sensors = <14>;
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interrupts-extended = <&pdc 27 IRQ_TYPE_LEVEL_HIGH>,
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<&pdc 29 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "uplow", "critical";
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#thermal-sensor-cells = <1>;
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};
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aoss_qmp: power-management@c300000 {
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compatible = "qcom,sm8350-aoss-qmp", "qcom,aoss-qmp";
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reg = <0 0x0c300000 0 0x400>;
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interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP
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IRQ_TYPE_EDGE_RISING>;
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mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>;
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#clock-cells = <0>;
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};
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sram@c3f0000 {
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compatible = "qcom,rpmh-stats";
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reg = <0 0x0c3f0000 0 0x400>;
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};
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spmi_bus: spmi@c440000 {
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compatible = "qcom,spmi-pmic-arb";
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reg = <0x0 0x0c440000 0x0 0x1100>,
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<0x0 0x0c600000 0x0 0x2000000>,
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<0x0 0x0e600000 0x0 0x100000>,
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<0x0 0x0e700000 0x0 0xa0000>,
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<0x0 0x0c40a000 0x0 0x26000>;
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reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
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interrupt-names = "periph_irq";
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interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
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qcom,ee = <0>;
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qcom,channel = <0>;
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#address-cells = <2>;
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#size-cells = <0>;
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interrupt-controller;
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#interrupt-cells = <4>;
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};
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tlmm: pinctrl@f100000 {
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compatible = "qcom,sm8350-tlmm";
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reg = <0 0x0f100000 0 0x300000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&tlmm 0 0 204>;
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wakeup-parent = <&pdc>;
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sdc2_default_state: sdc2-default-state {
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clk-pins {
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pins = "sdc2_clk";
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drive-strength = <16>;
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bias-disable;
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};
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cmd-pins {
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pins = "sdc2_cmd";
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drive-strength = <16>;
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bias-pull-up;
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};
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data-pins {
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pins = "sdc2_data";
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drive-strength = <16>;
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bias-pull-up;
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};
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};
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sdc2_sleep_state: sdc2-sleep-state {
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clk-pins {
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pins = "sdc2_clk";
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drive-strength = <2>;
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bias-disable;
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};
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cmd-pins {
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pins = "sdc2_cmd";
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drive-strength = <2>;
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bias-pull-up;
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};
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data-pins {
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pins = "sdc2_data";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qup_uart3_default_state: qup-uart3-default-state {
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rx-pins {
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pins = "gpio18";
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function = "qup3";
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};
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tx-pins {
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pins = "gpio19";
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function = "qup3";
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};
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};
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qup_uart6_default: qup-uart6-default-state {
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pins = "gpio30", "gpio31";
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function = "qup6";
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drive-strength = <2>;
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bias-disable;
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};
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qup_uart18_default: qup-uart18-default-state {
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pins = "gpio58", "gpio59";
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function = "qup18";
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drive-strength = <2>;
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bias-disable;
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};
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qup_i2c0_default: qup-i2c0-default-state {
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pins = "gpio4", "gpio5";
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function = "qup0";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c1_default: qup-i2c1-default-state {
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pins = "gpio8", "gpio9";
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function = "qup1";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c2_default: qup-i2c2-default-state {
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pins = "gpio12", "gpio13";
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function = "qup2";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c4_default: qup-i2c4-default-state {
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pins = "gpio20", "gpio21";
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function = "qup4";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c5_default: qup-i2c5-default-state {
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pins = "gpio24", "gpio25";
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function = "qup5";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c6_default: qup-i2c6-default-state {
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pins = "gpio28", "gpio29";
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function = "qup6";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c7_default: qup-i2c7-default-state {
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pins = "gpio32", "gpio33";
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function = "qup7";
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drive-strength = <2>;
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bias-disable;
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};
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qup_i2c8_default: qup-i2c8-default-state {
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pins = "gpio36", "gpio37";
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function = "qup8";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c9_default: qup-i2c9-default-state {
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pins = "gpio40", "gpio41";
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function = "qup9";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c10_default: qup-i2c10-default-state {
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pins = "gpio44", "gpio45";
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function = "qup10";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c11_default: qup-i2c11-default-state {
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pins = "gpio48", "gpio49";
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function = "qup11";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c12_default: qup-i2c12-default-state {
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pins = "gpio52", "gpio53";
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function = "qup12";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c13_default: qup-i2c13-default-state {
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pins = "gpio0", "gpio1";
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function = "qup13";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c14_default: qup-i2c14-default-state {
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pins = "gpio56", "gpio57";
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function = "qup14";
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drive-strength = <2>;
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bias-disable;
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};
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qup_i2c15_default: qup-i2c15-default-state {
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pins = "gpio60", "gpio61";
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function = "qup15";
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drive-strength = <2>;
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bias-disable;
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};
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qup_i2c16_default: qup-i2c16-default-state {
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pins = "gpio64", "gpio65";
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function = "qup16";
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drive-strength = <2>;
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bias-disable;
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};
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qup_i2c17_default: qup-i2c17-default-state {
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pins = "gpio72", "gpio73";
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function = "qup17";
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drive-strength = <2>;
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bias-disable;
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};
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qup_i2c19_default: qup-i2c19-default-state {
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pins = "gpio76", "gpio77";
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function = "qup19";
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drive-strength = <2>;
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bias-disable;
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};
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};
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sdhc_2: mmc@8804000 {
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compatible = "qcom,sm8350-sdhci", "qcom,sdhci-msm-v5";
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reg = <0 0x08804000 0 0x1000>;
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@ -2731,6 +2461,276 @@ dispcc: clock-controller@af00000 {
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power-domains = <&rpmhpd SM8350_MMCX>;
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};
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pdc: interrupt-controller@b220000 {
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compatible = "qcom,sm8350-pdc", "qcom,pdc";
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reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
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qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>,
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<59 312 3>, <62 374 2>, <64 434 2>, <66 438 3>,
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<69 86 1>, <70 520 54>, <124 609 31>, <155 63 1>,
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<156 716 12>;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupt-controller;
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};
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tsens0: thermal-sensor@c263000 {
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compatible = "qcom,sm8350-tsens", "qcom,tsens-v2";
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reg = <0 0x0c263000 0 0x1ff>, /* TM */
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<0 0x0c222000 0 0x8>; /* SROT */
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#qcom,sensors = <15>;
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interrupts-extended = <&pdc 26 IRQ_TYPE_LEVEL_HIGH>,
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<&pdc 28 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "uplow", "critical";
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#thermal-sensor-cells = <1>;
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};
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tsens1: thermal-sensor@c265000 {
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compatible = "qcom,sm8350-tsens", "qcom,tsens-v2";
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reg = <0 0x0c265000 0 0x1ff>, /* TM */
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<0 0x0c223000 0 0x8>; /* SROT */
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#qcom,sensors = <14>;
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interrupts-extended = <&pdc 27 IRQ_TYPE_LEVEL_HIGH>,
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<&pdc 29 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "uplow", "critical";
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#thermal-sensor-cells = <1>;
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};
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aoss_qmp: power-management@c300000 {
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compatible = "qcom,sm8350-aoss-qmp", "qcom,aoss-qmp";
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reg = <0 0x0c300000 0 0x400>;
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interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP
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IRQ_TYPE_EDGE_RISING>;
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mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>;
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#clock-cells = <0>;
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};
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sram@c3f0000 {
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compatible = "qcom,rpmh-stats";
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reg = <0 0x0c3f0000 0 0x400>;
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};
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spmi_bus: spmi@c440000 {
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compatible = "qcom,spmi-pmic-arb";
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reg = <0x0 0x0c440000 0x0 0x1100>,
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<0x0 0x0c600000 0x0 0x2000000>,
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<0x0 0x0e600000 0x0 0x100000>,
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<0x0 0x0e700000 0x0 0xa0000>,
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<0x0 0x0c40a000 0x0 0x26000>;
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reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
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interrupt-names = "periph_irq";
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interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
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qcom,ee = <0>;
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qcom,channel = <0>;
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#address-cells = <2>;
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#size-cells = <0>;
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interrupt-controller;
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#interrupt-cells = <4>;
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};
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tlmm: pinctrl@f100000 {
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compatible = "qcom,sm8350-tlmm";
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reg = <0 0x0f100000 0 0x300000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&tlmm 0 0 204>;
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wakeup-parent = <&pdc>;
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sdc2_default_state: sdc2-default-state {
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clk-pins {
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pins = "sdc2_clk";
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drive-strength = <16>;
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bias-disable;
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};
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cmd-pins {
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pins = "sdc2_cmd";
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drive-strength = <16>;
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bias-pull-up;
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};
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data-pins {
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pins = "sdc2_data";
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drive-strength = <16>;
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bias-pull-up;
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};
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};
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sdc2_sleep_state: sdc2-sleep-state {
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clk-pins {
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pins = "sdc2_clk";
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drive-strength = <2>;
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bias-disable;
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};
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cmd-pins {
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pins = "sdc2_cmd";
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drive-strength = <2>;
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bias-pull-up;
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};
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data-pins {
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pins = "sdc2_data";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qup_uart3_default_state: qup-uart3-default-state {
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rx-pins {
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pins = "gpio18";
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function = "qup3";
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};
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tx-pins {
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pins = "gpio19";
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function = "qup3";
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};
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};
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qup_uart6_default: qup-uart6-default-state {
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pins = "gpio30", "gpio31";
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function = "qup6";
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drive-strength = <2>;
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bias-disable;
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};
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qup_uart18_default: qup-uart18-default-state {
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pins = "gpio58", "gpio59";
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function = "qup18";
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drive-strength = <2>;
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bias-disable;
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};
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qup_i2c0_default: qup-i2c0-default-state {
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pins = "gpio4", "gpio5";
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function = "qup0";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c1_default: qup-i2c1-default-state {
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pins = "gpio8", "gpio9";
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function = "qup1";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c2_default: qup-i2c2-default-state {
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pins = "gpio12", "gpio13";
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function = "qup2";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c4_default: qup-i2c4-default-state {
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pins = "gpio20", "gpio21";
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function = "qup4";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c5_default: qup-i2c5-default-state {
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pins = "gpio24", "gpio25";
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function = "qup5";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c6_default: qup-i2c6-default-state {
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pins = "gpio28", "gpio29";
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||||
function = "qup6";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
qup_i2c7_default: qup-i2c7-default-state {
|
||||
pins = "gpio32", "gpio33";
|
||||
function = "qup7";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
qup_i2c8_default: qup-i2c8-default-state {
|
||||
pins = "gpio36", "gpio37";
|
||||
function = "qup8";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
qup_i2c9_default: qup-i2c9-default-state {
|
||||
pins = "gpio40", "gpio41";
|
||||
function = "qup9";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
qup_i2c10_default: qup-i2c10-default-state {
|
||||
pins = "gpio44", "gpio45";
|
||||
function = "qup10";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
qup_i2c11_default: qup-i2c11-default-state {
|
||||
pins = "gpio48", "gpio49";
|
||||
function = "qup11";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
qup_i2c12_default: qup-i2c12-default-state {
|
||||
pins = "gpio52", "gpio53";
|
||||
function = "qup12";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
qup_i2c13_default: qup-i2c13-default-state {
|
||||
pins = "gpio0", "gpio1";
|
||||
function = "qup13";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
qup_i2c14_default: qup-i2c14-default-state {
|
||||
pins = "gpio56", "gpio57";
|
||||
function = "qup14";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
qup_i2c15_default: qup-i2c15-default-state {
|
||||
pins = "gpio60", "gpio61";
|
||||
function = "qup15";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
qup_i2c16_default: qup-i2c16-default-state {
|
||||
pins = "gpio64", "gpio65";
|
||||
function = "qup16";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
qup_i2c17_default: qup-i2c17-default-state {
|
||||
pins = "gpio72", "gpio73";
|
||||
function = "qup17";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
qup_i2c19_default: qup-i2c19-default-state {
|
||||
pins = "gpio76", "gpio77";
|
||||
function = "qup19";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
apps_smmu: iommu@15000000 {
|
||||
compatible = "qcom,sm8350-smmu-500", "arm,mmu-500";
|
||||
reg = <0 0x15000000 0 0x100000>;
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user