From 50753d29ae2baa4620c380cb8978e678cbb0531b Mon Sep 17 00:00:00 2001 From: Guru Das Srinagesh Date: Thu, 17 Mar 2022 16:17:01 -0700 Subject: [PATCH] pinctrl: pineapple: Update driver to match TLMM data Update the driver to match the data corresponding to the TLMM block on pineapple SoC. Change-Id: I9ce707d1497de74ba960d896692aeab234f987c5 Signed-off-by: Guru Das Srinagesh --- drivers/pinctrl/qcom/pinctrl-pineapple.c | 2011 ++++++++++++++-------- 1 file changed, 1267 insertions(+), 744 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-pineapple.c b/drivers/pinctrl/qcom/pinctrl-pineapple.c index 794dedbbf7a4..7d6930d6e7b9 100644 --- a/drivers/pinctrl/qcom/pinctrl-pineapple.c +++ b/drivers/pinctrl/qcom/pinctrl-pineapple.c @@ -116,10 +116,14 @@ .offset = qup_offset, \ } -#define QUP_I3C_8_MODE_OFFSET 0xE8000 -#define QUP_I3C_9_MODE_OFFSET 0xE9000 -#define QUP_I3C_16_MODE_OFFSET 0xEA000 -#define QUP_I3C_15_MODE_OFFSET 0xEB000 +#define QUP_1_I3C_0_MODE_OFFSET 0xE9000 +#define QUP_1_I3C_1_MODE_OFFSET 0xEA000 +#define QUP_1_I3C_4_MODE_OFFSET 0xEB000 +#define QUP_1_I3C_6_MODE_OFFSET 0xEC000 +#define QUP_2_I3C_0_MODE_OFFSET 0xED000 +#define QUP_2_I3C_1_MODE_OFFSET 0xEE000 +#define QUP_2_I3C_2_MODE_OFFSET 0xEF000 +#define QUP_2_I3C_3_MODE_OFFSET 0xF0000 static const struct pinctrl_pin_desc pineapple_pins[] = { PINCTRL_PIN(0, "GPIO_0"), @@ -558,62 +562,91 @@ static const unsigned int sdc2_data_pins[] = { 213 }; enum pineapple_functions { msm_mux_gpio, - msm_mux_aoss_cti, - msm_mux_atest_char, - msm_mux_atest_char0, - msm_mux_atest_char1, - msm_mux_atest_char2, - msm_mux_atest_char3, - msm_mux_atest_usb0, - msm_mux_atest_usb00, - msm_mux_atest_usb01, - msm_mux_atest_usb02, - msm_mux_atest_usb03, - msm_mux_audio_ext, - msm_mux_audio_ref, - msm_mux_cam_aon, + msm_mux_aoss_cti_debug, + msm_mux_atest_char_start, + msm_mux_atest_char_status0, + msm_mux_atest_char_status1, + msm_mux_atest_char_status2, + msm_mux_atest_char_status3, + msm_mux_atest_usb0_atereset, + msm_mux_atest_usb0_testdataout00, + msm_mux_atest_usb0_testdataout01, + msm_mux_atest_usb0_testdataout02, + msm_mux_atest_usb0_testdataout03, + msm_mux_audio_ext_mclk0, + msm_mux_audio_ext_mclk1, + msm_mux_audio_ref_clk, + msm_mux_cam_aon_mclk4, msm_mux_cam_mclk, - msm_mux_cci_async, - msm_mux_cci_i2c, + msm_mux_cci_async_in0, + msm_mux_cci_async_in1, + msm_mux_cci_async_in2, + msm_mux_cci_i2c_scl0, + msm_mux_cci_i2c_scl1, + msm_mux_cci_i2c_scl2, + msm_mux_cci_i2c_scl3, + msm_mux_cci_i2c_scl4, + msm_mux_cci_i2c_scl5, + msm_mux_cci_i2c_sda0, + msm_mux_cci_i2c_sda1, + msm_mux_cci_i2c_sda2, + msm_mux_cci_i2c_sda3, + msm_mux_cci_i2c_sda4, + msm_mux_cci_i2c_sda5, msm_mux_cci_timer0, msm_mux_cci_timer1, msm_mux_cci_timer2, msm_mux_cci_timer3, msm_mux_cci_timer4, - msm_mux_cmu_rng0, - msm_mux_cmu_rng1, - msm_mux_cmu_rng2, - msm_mux_cmu_rng3, - msm_mux_coex_uart1, - msm_mux_coex_uart2, - msm_mux_cri_trng, - msm_mux_dbg_out, - msm_mux_ddr_bist, - msm_mux_ddr_pxi0, - msm_mux_ddr_pxi1, - msm_mux_ddr_pxi2, - msm_mux_ddr_pxi3, - msm_mux_do_not, - msm_mux_do_not0, - msm_mux_do_not1, - msm_mux_do_not2, - msm_mux_do_not3, - msm_mux_dp_hot, - msm_mux_gcc_gp1, - msm_mux_gcc_gp2, - msm_mux_gcc_gp3, - msm_mux_gnss_adc0, - msm_mux_gnss_adc1, - msm_mux_i2chub0_se0, - msm_mux_i2chub0_se1, - msm_mux_i2chub0_se2, - msm_mux_i2chub0_se3, - msm_mux_i2chub0_se4, - msm_mux_i2chub0_se5, - msm_mux_i2chub0_se6, - msm_mux_i2chub0_se7, - msm_mux_i2chub0_se8, - msm_mux_i2chub0_se9, + msm_mux_cmu_rng_entropy0, + msm_mux_cmu_rng_entropy1, + msm_mux_cmu_rng_entropy2, + msm_mux_cmu_rng_entropy3, + msm_mux_coex_uart1_rx, + msm_mux_coex_uart1_tx, + msm_mux_coex_uart2_rx, + msm_mux_coex_uart2_tx, + msm_mux_cri_trng_rosc, + msm_mux_dbg_out_clk, + msm_mux_ddr_bist_complete, + msm_mux_ddr_bist_fail, + msm_mux_ddr_bist_start, + msm_mux_ddr_bist_stop, + msm_mux_ddr_pxi0_test, + msm_mux_ddr_pxi1_test, + msm_mux_ddr_pxi2_test, + msm_mux_ddr_pxi3_test, + msm_mux_do_not_expose, + msm_mux_do_not_expose0, + msm_mux_do_not_expose1, + msm_mux_do_not_expose2, + msm_mux_do_not_expose3, + msm_mux_dp_hot_plug, + msm_mux_gcc_gp1_clk, + msm_mux_gcc_gp2_clk, + msm_mux_gcc_gp3_clk, + msm_mux_gnss_adc_dtest0, + msm_mux_gnss_adc_dtest1, + msm_mux_i2chub0_se0_l0, + msm_mux_i2chub0_se0_l1, + msm_mux_i2chub0_se1_l0, + msm_mux_i2chub0_se1_l1, + msm_mux_i2chub0_se2_l0, + msm_mux_i2chub0_se2_l1, + msm_mux_i2chub0_se3_l0, + msm_mux_i2chub0_se3_l1, + msm_mux_i2chub0_se4_l0, + msm_mux_i2chub0_se4_l1, + msm_mux_i2chub0_se5_l0, + msm_mux_i2chub0_se5_l1, + msm_mux_i2chub0_se6_l0, + msm_mux_i2chub0_se6_l1, + msm_mux_i2chub0_se7_l0, + msm_mux_i2chub0_se7_l1, + msm_mux_i2chub0_se8_l0, + msm_mux_i2chub0_se8_l1, + msm_mux_i2chub0_se9_l0, + msm_mux_i2chub0_se9_l1, msm_mux_i2s0_data0, msm_mux_i2s0_data1, msm_mux_i2s0_sck, @@ -622,119 +655,182 @@ enum pineapple_functions { msm_mux_i2s1_data1, msm_mux_i2s1_sck, msm_mux_i2s1_ws, - msm_mux_ibi_i3c, - msm_mux_jitter_bist, - msm_mux_mdp_vsync, - msm_mux_mdp_vsync0, - msm_mux_mdp_vsync1, - msm_mux_mdp_vsync2, - msm_mux_mdp_vsync3, + msm_mux_ibi_i3c_qup1, + msm_mux_ibi_i3c_qup2, + msm_mux_jitter_bist_ref, + msm_mux_mdp_vsync0_out, + msm_mux_mdp_vsync1_out, + msm_mux_mdp_vsync2_out, + msm_mux_mdp_vsync3_out, + msm_mux_mdp_vsync_e, + msm_mux_mdp_vsync_p, + msm_mux_mdp_vsync_s, msm_mux_nav_gpio0, msm_mux_nav_gpio1, msm_mux_nav_gpio2, msm_mux_nav_gpio3, - msm_mux_pcie0_clk, - msm_mux_pcie1_clk, - msm_mux_phase_flag0, - msm_mux_phase_flag1, - msm_mux_phase_flag10, - msm_mux_phase_flag11, - msm_mux_phase_flag12, - msm_mux_phase_flag13, - msm_mux_phase_flag14, - msm_mux_phase_flag15, - msm_mux_phase_flag16, - msm_mux_phase_flag17, - msm_mux_phase_flag18, - msm_mux_phase_flag19, - msm_mux_phase_flag2, - msm_mux_phase_flag20, - msm_mux_phase_flag21, - msm_mux_phase_flag22, - msm_mux_phase_flag23, - msm_mux_phase_flag24, - msm_mux_phase_flag25, - msm_mux_phase_flag26, - msm_mux_phase_flag27, - msm_mux_phase_flag28, - msm_mux_phase_flag29, - msm_mux_phase_flag3, - msm_mux_phase_flag30, - msm_mux_phase_flag31, - msm_mux_phase_flag4, - msm_mux_phase_flag5, - msm_mux_phase_flag6, - msm_mux_phase_flag7, - msm_mux_phase_flag8, - msm_mux_phase_flag9, - msm_mux_pll_bist, - msm_mux_pll_clk, - msm_mux_prng_rosc0, - msm_mux_prng_rosc1, - msm_mux_prng_rosc2, - msm_mux_prng_rosc3, - msm_mux_qdss_cti, - msm_mux_qdss_gpio, - msm_mux_qdss_gpio0, - msm_mux_qdss_gpio1, - msm_mux_qdss_gpio10, - msm_mux_qdss_gpio11, - msm_mux_qdss_gpio12, - msm_mux_qdss_gpio13, - msm_mux_qdss_gpio14, - msm_mux_qdss_gpio15, - msm_mux_qdss_gpio2, - msm_mux_qdss_gpio3, - msm_mux_qdss_gpio4, - msm_mux_qdss_gpio5, - msm_mux_qdss_gpio6, - msm_mux_qdss_gpio7, - msm_mux_qdss_gpio8, - msm_mux_qdss_gpio9, - msm_mux_qlink_big, - msm_mux_qlink_little, - msm_mux_qlink_wmss, + msm_mux_pcie0_clk_req, + msm_mux_pcie1_clk_req, + msm_mux_phase_flag_status0, + msm_mux_phase_flag_status1, + msm_mux_phase_flag_status10, + msm_mux_phase_flag_status11, + msm_mux_phase_flag_status12, + msm_mux_phase_flag_status13, + msm_mux_phase_flag_status14, + msm_mux_phase_flag_status15, + msm_mux_phase_flag_status16, + msm_mux_phase_flag_status17, + msm_mux_phase_flag_status18, + msm_mux_phase_flag_status19, + msm_mux_phase_flag_status2, + msm_mux_phase_flag_status20, + msm_mux_phase_flag_status21, + msm_mux_phase_flag_status22, + msm_mux_phase_flag_status23, + msm_mux_phase_flag_status24, + msm_mux_phase_flag_status25, + msm_mux_phase_flag_status26, + msm_mux_phase_flag_status27, + msm_mux_phase_flag_status28, + msm_mux_phase_flag_status29, + msm_mux_phase_flag_status3, + msm_mux_phase_flag_status30, + msm_mux_phase_flag_status31, + msm_mux_phase_flag_status4, + msm_mux_phase_flag_status5, + msm_mux_phase_flag_status6, + msm_mux_phase_flag_status7, + msm_mux_phase_flag_status8, + msm_mux_phase_flag_status9, + msm_mux_pll_bist_sync, + msm_mux_pll_clk_aux, + msm_mux_prng_rosc_test0, + msm_mux_prng_rosc_test1, + msm_mux_prng_rosc_test2, + msm_mux_prng_rosc_test3, + msm_mux_qdss_cti_trig0, + msm_mux_qdss_cti_trig1, + msm_mux_qdss_gpio_traceclk, + msm_mux_qdss_gpio_tracectl, + msm_mux_qdss_gpio_tracedata0, + msm_mux_qdss_gpio_tracedata1, + msm_mux_qdss_gpio_tracedata10, + msm_mux_qdss_gpio_tracedata11, + msm_mux_qdss_gpio_tracedata12, + msm_mux_qdss_gpio_tracedata13, + msm_mux_qdss_gpio_tracedata14, + msm_mux_qdss_gpio_tracedata15, + msm_mux_qdss_gpio_tracedata2, + msm_mux_qdss_gpio_tracedata3, + msm_mux_qdss_gpio_tracedata4, + msm_mux_qdss_gpio_tracedata5, + msm_mux_qdss_gpio_tracedata6, + msm_mux_qdss_gpio_tracedata7, + msm_mux_qdss_gpio_tracedata8, + msm_mux_qdss_gpio_tracedata9, + msm_mux_qlink_big_enable, + msm_mux_qlink_big_request, + msm_mux_qlink_little_enable, + msm_mux_qlink_little_request, + msm_mux_qlink_wmss_reset, msm_mux_qspi0, msm_mux_qspi1, msm_mux_qspi2, msm_mux_qspi3, msm_mux_qspi_clk, - msm_mux_qspi_cs, - msm_mux_qup1_se0, - msm_mux_qup1_se1, - msm_mux_qup1_se2, - msm_mux_qup1_se3, - msm_mux_qup1_se4, - msm_mux_qup1_se5, - msm_mux_qup1_se6, - msm_mux_qup1_se7, - msm_mux_qup2_se0, - msm_mux_qup2_se1, - msm_mux_qup2_se2, - msm_mux_qup2_se3, - msm_mux_qup2_se4, - msm_mux_qup2_se5, - msm_mux_qup2_se6, - msm_mux_qup2_se7, - msm_mux_sd_write, + msm_mux_qspi_cs_n, + msm_mux_qup1_se0_l0, + msm_mux_qup1_se0_l1, + msm_mux_qup1_se0_l2, + msm_mux_qup1_se0_l3, + msm_mux_qup1_se1_l0, + msm_mux_qup1_se1_l1, + msm_mux_qup1_se1_l2, + msm_mux_qup1_se1_l3, + msm_mux_qup1_se2_l0, + msm_mux_qup1_se2_l1, + msm_mux_qup1_se2_l2, + msm_mux_qup1_se2_l3, + msm_mux_qup1_se2_l4, + msm_mux_qup1_se2_l5, + msm_mux_qup1_se2_l6, + msm_mux_qup1_se3_l0, + msm_mux_qup1_se3_l1, + msm_mux_qup1_se3_l2, + msm_mux_qup1_se3_l3, + msm_mux_qup1_se4_l0, + msm_mux_qup1_se4_l1, + msm_mux_qup1_se4_l2, + msm_mux_qup1_se4_l3, + msm_mux_qup1_se5_l0, + msm_mux_qup1_se5_l1, + msm_mux_qup1_se5_l2, + msm_mux_qup1_se5_l3, + msm_mux_qup1_se6_l0, + msm_mux_qup1_se6_l1, + msm_mux_qup1_se6_l2, + msm_mux_qup1_se6_l3, + msm_mux_qup1_se7_l0, + msm_mux_qup1_se7_l1, + msm_mux_qup1_se7_l2, + msm_mux_qup1_se7_l3, + msm_mux_qup2_se0_l0, + msm_mux_qup2_se0_l1, + msm_mux_qup2_se0_l2, + msm_mux_qup2_se0_l3, + msm_mux_qup2_se1_l0, + msm_mux_qup2_se1_l1, + msm_mux_qup2_se1_l2, + msm_mux_qup2_se1_l3, + msm_mux_qup2_se2_l0, + msm_mux_qup2_se2_l1, + msm_mux_qup2_se2_l2, + msm_mux_qup2_se2_l3, + msm_mux_qup2_se2_l4, + msm_mux_qup2_se2_l5, + msm_mux_qup2_se2_l6, + msm_mux_qup2_se3_l0, + msm_mux_qup2_se3_l1, + msm_mux_qup2_se3_l2, + msm_mux_qup2_se3_l3, + msm_mux_qup2_se4_l0, + msm_mux_qup2_se4_l1, + msm_mux_qup2_se4_l2, + msm_mux_qup2_se4_l3, + msm_mux_qup2_se5_l0, + msm_mux_qup2_se5_l1, + msm_mux_qup2_se5_l2, + msm_mux_qup2_se5_l3, + msm_mux_qup2_se5_l6, + msm_mux_qup2_se6_l0, + msm_mux_qup2_se6_l1, + msm_mux_qup2_se6_l2, + msm_mux_qup2_se6_l3, + msm_mux_qup2_se7_l0, + msm_mux_qup2_se7_l1, + msm_mux_qup2_se7_l2, + msm_mux_qup2_se7_l3, + msm_mux_sd_write_protect, msm_mux_sdc40, msm_mux_sdc41, msm_mux_sdc42, msm_mux_sdc43, msm_mux_sdc4_clk, msm_mux_sdc4_cmd, - msm_mux_tb_trig, - msm_mux_tgu_ch0, - msm_mux_tgu_ch1, - msm_mux_tgu_ch2, - msm_mux_tgu_ch3, - msm_mux_tmess_prng0, - msm_mux_tmess_prng1, - msm_mux_tmess_prng2, - msm_mux_tmess_prng3, - msm_mux_tsense_pwm1, - msm_mux_tsense_pwm2, - msm_mux_tsense_pwm3, + msm_mux_tb_trig_sdc2, + msm_mux_tb_trig_sdc4, + msm_mux_tgu_ch0_trigout, + msm_mux_tgu_ch1_trigout, + msm_mux_tgu_ch2_trigout, + msm_mux_tgu_ch3_trigout, + msm_mux_tmess_prng_rosc0, + msm_mux_tmess_prng_rosc1, + msm_mux_tmess_prng_rosc2, + msm_mux_tmess_prng_rosc3, + msm_mux_tsense_pwm1_out, + msm_mux_tsense_pwm2_out, + msm_mux_tsense_pwm3_out, msm_mux_uim0_clk, msm_mux_uim0_data, msm_mux_uim0_present, @@ -743,11 +839,11 @@ enum pineapple_functions { msm_mux_uim1_data, msm_mux_uim1_present, msm_mux_uim1_reset, - msm_mux_usb1_hs, - msm_mux_usb_phy, + msm_mux_usb1_hs_ac, + msm_mux_usb_phy_ps, msm_mux_vfr_0, msm_mux_vfr_1, - msm_mux_vsense_trigger, + msm_mux_vsense_trigger_mirnat, msm_mux_NA, }; @@ -786,58 +882,99 @@ static const char * const gpio_groups[] = { "gpio201", "gpio202", "gpio203", "gpio204", "gpio205", "gpio206", "gpio207", "gpio208", "gpio209", }; -static const char * const aoss_cti_groups[] = { +static const char * const aoss_cti_debug_groups[] = { "gpio50", "gpio51", "gpio60", "gpio61", }; -static const char * const atest_char_groups[] = { +static const char * const atest_char_start_groups[] = { "gpio137", }; -static const char * const atest_char0_groups[] = { +static const char * const atest_char_status0_groups[] = { "gpio133", }; -static const char * const atest_char1_groups[] = { +static const char * const atest_char_status1_groups[] = { "gpio132", }; -static const char * const atest_char2_groups[] = { +static const char * const atest_char_status2_groups[] = { "gpio131", }; -static const char * const atest_char3_groups[] = { +static const char * const atest_char_status3_groups[] = { "gpio130", }; -static const char * const atest_usb0_groups[] = { +static const char * const atest_usb0_atereset_groups[] = { "gpio74", }; -static const char * const atest_usb00_groups[] = { +static const char * const atest_usb0_testdataout00_groups[] = { "gpio131", }; -static const char * const atest_usb01_groups[] = { +static const char * const atest_usb0_testdataout01_groups[] = { "gpio130", }; -static const char * const atest_usb02_groups[] = { +static const char * const atest_usb0_testdataout02_groups[] = { "gpio71", }; -static const char * const atest_usb03_groups[] = { +static const char * const atest_usb0_testdataout03_groups[] = { "gpio72", }; -static const char * const audio_ext_groups[] = { - "gpio124", "gpio125", +static const char * const audio_ext_mclk0_groups[] = { + "gpio125", }; -static const char * const audio_ref_groups[] = { +static const char * const audio_ext_mclk1_groups[] = { "gpio124", }; -static const char * const cam_aon_groups[] = { +static const char * const audio_ref_clk_groups[] = { + "gpio124", +}; +static const char * const cam_aon_mclk4_groups[] = { "gpio104", }; static const char * const cam_mclk_groups[] = { "gpio100", "gpio101", "gpio102", "gpio103", "gpio105", "gpio106", "gpio108", }; -static const char * const cci_async_groups[] = { - "gpio15", "gpio163", "gpio164", +static const char * const cci_async_in0_groups[] = { + "gpio15", }; -static const char * const cci_i2c_groups[] = { - "gpio12", "gpio13", "gpio112", "gpio113", "gpio114", "gpio115", - "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", "gpio153", +static const char * const cci_async_in1_groups[] = { + "gpio163", +}; +static const char * const cci_async_in2_groups[] = { + "gpio164", +}; +static const char * const cci_i2c_scl0_groups[] = { + "gpio114", +}; +static const char * const cci_i2c_scl1_groups[] = { + "gpio116", +}; +static const char * const cci_i2c_scl2_groups[] = { + "gpio118", +}; +static const char * const cci_i2c_scl3_groups[] = { + "gpio13", +}; +static const char * const cci_i2c_scl4_groups[] = { + "gpio153", +}; +static const char * const cci_i2c_scl5_groups[] = { + "gpio120", +}; +static const char * const cci_i2c_sda0_groups[] = { + "gpio113", +}; +static const char * const cci_i2c_sda1_groups[] = { + "gpio115", +}; +static const char * const cci_i2c_sda2_groups[] = { + "gpio117", +}; +static const char * const cci_i2c_sda3_groups[] = { + "gpio12", +}; +static const char * const cci_i2c_sda4_groups[] = { + "gpio112", +}; +static const char * const cci_i2c_sda5_groups[] = { + "gpio119", }; static const char * const cci_timer0_groups[] = { "gpio109", @@ -854,107 +991,152 @@ static const char * const cci_timer3_groups[] = { static const char * const cci_timer4_groups[] = { "gpio111", }; -static const char * const cmu_rng0_groups[] = { +static const char * const cmu_rng_entropy0_groups[] = { "gpio94", "gpio129", }; -static const char * const cmu_rng1_groups[] = { +static const char * const cmu_rng_entropy1_groups[] = { "gpio95", "gpio128", }; -static const char * const cmu_rng2_groups[] = { +static const char * const cmu_rng_entropy2_groups[] = { "gpio96", "gpio127", }; -static const char * const cmu_rng3_groups[] = { +static const char * const cmu_rng_entropy3_groups[] = { "gpio112", "gpio122", }; -static const char * const coex_uart1_groups[] = { - "gpio148", "gpio149", +static const char * const coex_uart1_rx_groups[] = { + "gpio148", }; -static const char * const coex_uart2_groups[] = { - "gpio150", "gpio151", +static const char * const coex_uart1_tx_groups[] = { + "gpio149", }; -static const char * const cri_trng_groups[] = { +static const char * const coex_uart2_rx_groups[] = { + "gpio150", +}; +static const char * const coex_uart2_tx_groups[] = { + "gpio151", +}; +static const char * const cri_trng_rosc_groups[] = { "gpio187", }; -static const char * const dbg_out_groups[] = { +static const char * const dbg_out_clk_groups[] = { "gpio92", }; -static const char * const ddr_bist_groups[] = { - "gpio40", "gpio41", "gpio44", "gpio45", +static const char * const ddr_bist_complete_groups[] = { + "gpio44", }; -static const char * const ddr_pxi0_groups[] = { +static const char * const ddr_bist_fail_groups[] = { + "gpio40", +}; +static const char * const ddr_bist_start_groups[] = { + "gpio41", +}; +static const char * const ddr_bist_stop_groups[] = { + "gpio45", +}; +static const char * const ddr_pxi0_test_groups[] = { "gpio75", "gpio76", }; -static const char * const ddr_pxi1_groups[] = { +static const char * const ddr_pxi1_test_groups[] = { "gpio44", "gpio45", }; -static const char * const ddr_pxi2_groups[] = { +static const char * const ddr_pxi2_test_groups[] = { "gpio51", "gpio62", }; -static const char * const ddr_pxi3_groups[] = { +static const char * const ddr_pxi3_test_groups[] = { "gpio46", "gpio47", }; -static const char * const do_not_groups[] = { +static const char * const do_not_expose_groups[] = { "gpio134", "gpio135", "gpio136", }; -static const char * const do_not0_groups[] = { +static const char * const do_not_expose0_groups[] = { "gpio36", }; -static const char * const do_not1_groups[] = { +static const char * const do_not_expose1_groups[] = { "gpio37", }; -static const char * const do_not2_groups[] = { +static const char * const do_not_expose2_groups[] = { "gpio38", }; -static const char * const do_not3_groups[] = { +static const char * const do_not_expose3_groups[] = { "gpio39", }; -static const char * const dp_hot_groups[] = { +static const char * const dp_hot_plug_groups[] = { "gpio47", }; -static const char * const gcc_gp1_groups[] = { +static const char * const gcc_gp1_clk_groups[] = { "gpio86", "gpio134", }; -static const char * const gcc_gp2_groups[] = { +static const char * const gcc_gp2_clk_groups[] = { "gpio87", "gpio135", }; -static const char * const gcc_gp3_groups[] = { +static const char * const gcc_gp3_clk_groups[] = { "gpio88", "gpio136", }; -static const char * const gnss_adc0_groups[] = { +static const char * const gnss_adc_dtest0_groups[] = { "gpio89", "gpio91", }; -static const char * const gnss_adc1_groups[] = { +static const char * const gnss_adc_dtest1_groups[] = { "gpio90", "gpio92", }; -static const char * const i2chub0_se0_groups[] = { - "gpio64", "gpio65", +static const char * const i2chub0_se0_l0_groups[] = { + "gpio64", }; -static const char * const i2chub0_se1_groups[] = { - "gpio66", "gpio67", +static const char * const i2chub0_se0_l1_groups[] = { + "gpio65", }; -static const char * const i2chub0_se2_groups[] = { - "gpio68", "gpio69", +static const char * const i2chub0_se1_l0_groups[] = { + "gpio66", }; -static const char * const i2chub0_se3_groups[] = { - "gpio70", "gpio71", +static const char * const i2chub0_se1_l1_groups[] = { + "gpio67", }; -static const char * const i2chub0_se4_groups[] = { - "gpio72", "gpio73", +static const char * const i2chub0_se2_l0_groups[] = { + "gpio68", }; -static const char * const i2chub0_se5_groups[] = { - "gpio74", "gpio75", +static const char * const i2chub0_se2_l1_groups[] = { + "gpio69", }; -static const char * const i2chub0_se6_groups[] = { - "gpio76", "gpio77", +static const char * const i2chub0_se3_l0_groups[] = { + "gpio70", }; -static const char * const i2chub0_se7_groups[] = { - "gpio78", "gpio79", +static const char * const i2chub0_se3_l1_groups[] = { + "gpio71", }; -static const char * const i2chub0_se8_groups[] = { - "gpio206", "gpio207", +static const char * const i2chub0_se4_l0_groups[] = { + "gpio72", }; -static const char * const i2chub0_se9_groups[] = { - "gpio80", "gpio81", +static const char * const i2chub0_se4_l1_groups[] = { + "gpio73", +}; +static const char * const i2chub0_se5_l0_groups[] = { + "gpio74", +}; +static const char * const i2chub0_se5_l1_groups[] = { + "gpio75", +}; +static const char * const i2chub0_se6_l0_groups[] = { + "gpio76", +}; +static const char * const i2chub0_se6_l1_groups[] = { + "gpio77", +}; +static const char * const i2chub0_se7_l0_groups[] = { + "gpio78", +}; +static const char * const i2chub0_se7_l1_groups[] = { + "gpio79", +}; +static const char * const i2chub0_se8_l0_groups[] = { + "gpio206", +}; +static const char * const i2chub0_se8_l1_groups[] = { + "gpio207", +}; +static const char * const i2chub0_se9_l0_groups[] = { + "gpio80", +}; +static const char * const i2chub0_se9_l1_groups[] = { + "gpio81", }; static const char * const i2s0_data0_groups[] = { "gpio127", @@ -980,29 +1162,38 @@ static const char * const i2s1_sck_groups[] = { static const char * const i2s1_ws_groups[] = { "gpio123", }; -static const char * const ibi_i3c_groups[] = { - "gpio0", "gpio1", "gpio4", "gpio5", "gpio8", "gpio9", "gpio12", - "gpio13", "gpio32", "gpio33", "gpio36", "gpio37", "gpio48", "gpio49", - "gpio56", "gpio57", +static const char * const ibi_i3c_qup1_groups[] = { + "gpio32", "gpio33", "gpio36", "gpio37", "gpio48", "gpio49", "gpio56", + "gpio57", }; -static const char * const jitter_bist_groups[] = { +static const char * const ibi_i3c_qup2_groups[] = { + "gpio0", "gpio1", "gpio4", "gpio5", "gpio8", "gpio9", "gpio12", + "gpio13", +}; +static const char * const jitter_bist_ref_groups[] = { "gpio73", }; -static const char * const mdp_vsync_groups[] = { - "gpio86", "gpio87", "gpio88", "gpio133", "gpio137", -}; -static const char * const mdp_vsync0_groups[] = { +static const char * const mdp_vsync0_out_groups[] = { "gpio86", }; -static const char * const mdp_vsync1_groups[] = { +static const char * const mdp_vsync1_out_groups[] = { "gpio86", }; -static const char * const mdp_vsync2_groups[] = { +static const char * const mdp_vsync2_out_groups[] = { "gpio87", }; -static const char * const mdp_vsync3_groups[] = { +static const char * const mdp_vsync3_out_groups[] = { "gpio87", }; +static const char * const mdp_vsync_e_groups[] = { + "gpio88", +}; +static const char * const mdp_vsync_p_groups[] = { + "gpio86", "gpio137", +}; +static const char * const mdp_vsync_s_groups[] = { + "gpio87", "gpio133", +}; static const char * const nav_gpio0_groups[] = { "gpio154", }; @@ -1015,188 +1206,199 @@ static const char * const nav_gpio2_groups[] = { static const char * const nav_gpio3_groups[] = { "gpio154", }; -static const char * const pcie0_clk_groups[] = { +static const char * const pcie0_clk_req_groups[] = { "gpio95", }; -static const char * const pcie1_clk_groups[] = { +static const char * const pcie1_clk_req_groups[] = { "gpio98", }; -static const char * const phase_flag0_groups[] = { +static const char * const phase_flag_status0_groups[] = { "gpio0", }; -static const char * const phase_flag1_groups[] = { +static const char * const phase_flag_status1_groups[] = { "gpio1", }; -static const char * const phase_flag10_groups[] = { +static const char * const phase_flag_status10_groups[] = { "gpio15", }; -static const char * const phase_flag11_groups[] = { +static const char * const phase_flag_status11_groups[] = { "gpio16", }; -static const char * const phase_flag12_groups[] = { +static const char * const phase_flag_status12_groups[] = { "gpio17", }; -static const char * const phase_flag13_groups[] = { +static const char * const phase_flag_status13_groups[] = { "gpio19", }; -static const char * const phase_flag14_groups[] = { +static const char * const phase_flag_status14_groups[] = { "gpio94", }; -static const char * const phase_flag15_groups[] = { +static const char * const phase_flag_status15_groups[] = { "gpio95", }; -static const char * const phase_flag16_groups[] = { +static const char * const phase_flag_status16_groups[] = { "gpio96", }; -static const char * const phase_flag17_groups[] = { +static const char * const phase_flag_status17_groups[] = { "gpio109", }; -static const char * const phase_flag18_groups[] = { +static const char * const phase_flag_status18_groups[] = { "gpio13", }; -static const char * const phase_flag19_groups[] = { +static const char * const phase_flag_status19_groups[] = { "gpio111", }; -static const char * const phase_flag2_groups[] = { +static const char * const phase_flag_status2_groups[] = { "gpio3", }; -static const char * const phase_flag20_groups[] = { +static const char * const phase_flag_status20_groups[] = { "gpio112", }; -static const char * const phase_flag21_groups[] = { +static const char * const phase_flag_status21_groups[] = { "gpio113", }; -static const char * const phase_flag22_groups[] = { +static const char * const phase_flag_status22_groups[] = { "gpio114", }; -static const char * const phase_flag23_groups[] = { +static const char * const phase_flag_status23_groups[] = { "gpio115", }; -static const char * const phase_flag24_groups[] = { +static const char * const phase_flag_status24_groups[] = { "gpio116", }; -static const char * const phase_flag25_groups[] = { +static const char * const phase_flag_status25_groups[] = { "gpio117", }; -static const char * const phase_flag26_groups[] = { +static const char * const phase_flag_status26_groups[] = { "gpio118", }; -static const char * const phase_flag27_groups[] = { +static const char * const phase_flag_status27_groups[] = { "gpio119", }; -static const char * const phase_flag28_groups[] = { +static const char * const phase_flag_status28_groups[] = { "gpio120", }; -static const char * const phase_flag29_groups[] = { +static const char * const phase_flag_status29_groups[] = { "gpio153", }; -static const char * const phase_flag3_groups[] = { +static const char * const phase_flag_status3_groups[] = { "gpio4", }; -static const char * const phase_flag30_groups[] = { +static const char * const phase_flag_status30_groups[] = { "gpio163", }; -static const char * const phase_flag31_groups[] = { +static const char * const phase_flag_status31_groups[] = { "gpio164", }; -static const char * const phase_flag4_groups[] = { +static const char * const phase_flag_status4_groups[] = { "gpio5", }; -static const char * const phase_flag5_groups[] = { +static const char * const phase_flag_status5_groups[] = { "gpio7", }; -static const char * const phase_flag6_groups[] = { +static const char * const phase_flag_status6_groups[] = { "gpio8", }; -static const char * const phase_flag7_groups[] = { +static const char * const phase_flag_status7_groups[] = { "gpio9", }; -static const char * const phase_flag8_groups[] = { +static const char * const phase_flag_status8_groups[] = { "gpio11", }; -static const char * const phase_flag9_groups[] = { +static const char * const phase_flag_status9_groups[] = { "gpio12", }; -static const char * const pll_bist_groups[] = { +static const char * const pll_bist_sync_groups[] = { "gpio68", }; -static const char * const pll_clk_groups[] = { +static const char * const pll_clk_aux_groups[] = { "gpio106", }; -static const char * const prng_rosc0_groups[] = { +static const char * const prng_rosc_test0_groups[] = { "gpio186", }; -static const char * const prng_rosc1_groups[] = { +static const char * const prng_rosc_test1_groups[] = { "gpio183", }; -static const char * const prng_rosc2_groups[] = { +static const char * const prng_rosc_test2_groups[] = { "gpio182", }; -static const char * const prng_rosc3_groups[] = { +static const char * const prng_rosc_test3_groups[] = { "gpio181", }; -static const char * const qdss_cti_groups[] = { - "gpio27", "gpio31", "gpio78", "gpio79", "gpio82", "gpio83", "gpio159", - "gpio162", +static const char * const qdss_cti_trig0_groups[] = { + "gpio31", "gpio78", "gpio82", "gpio162", }; -static const char * const qdss_gpio_groups[] = { - "gpio115", "gpio116", "gpio148", "gpio149", +static const char * const qdss_cti_trig1_groups[] = { + "gpio27", "gpio79", "gpio83", "gpio159", }; -static const char * const qdss_gpio0_groups[] = { +static const char * const qdss_gpio_traceclk_groups[] = { + "gpio115", "gpio149", +}; +static const char * const qdss_gpio_tracectl_groups[] = { + "gpio116", "gpio148", +}; +static const char * const qdss_gpio_tracedata0_groups[] = { "gpio102", "gpio140", }; -static const char * const qdss_gpio1_groups[] = { +static const char * const qdss_gpio_tracedata1_groups[] = { "gpio103", "gpio141", }; -static const char * const qdss_gpio10_groups[] = { +static const char * const qdss_gpio_tracedata10_groups[] = { "gpio118", "gpio152", }; -static const char * const qdss_gpio11_groups[] = { +static const char * const qdss_gpio_tracedata11_groups[] = { "gpio100", "gpio154", }; -static const char * const qdss_gpio12_groups[] = { +static const char * const qdss_gpio_tracedata12_groups[] = { "gpio101", "gpio155", }; -static const char * const qdss_gpio13_groups[] = { +static const char * const qdss_gpio_tracedata13_groups[] = { "gpio13", "gpio156", }; -static const char * const qdss_gpio14_groups[] = { +static const char * const qdss_gpio_tracedata14_groups[] = { "gpio15", "gpio157", }; -static const char * const qdss_gpio15_groups[] = { +static const char * const qdss_gpio_tracedata15_groups[] = { "gpio7", "gpio158", }; -static const char * const qdss_gpio2_groups[] = { +static const char * const qdss_gpio_tracedata2_groups[] = { "gpio104", "gpio142", }; -static const char * const qdss_gpio3_groups[] = { +static const char * const qdss_gpio_tracedata3_groups[] = { "gpio105", "gpio143", }; -static const char * const qdss_gpio4_groups[] = { +static const char * const qdss_gpio_tracedata4_groups[] = { "gpio8", "gpio144", }; -static const char * const qdss_gpio5_groups[] = { +static const char * const qdss_gpio_tracedata5_groups[] = { "gpio145", "gpio153", }; -static const char * const qdss_gpio6_groups[] = { +static const char * const qdss_gpio_tracedata6_groups[] = { "gpio3", "gpio146", }; -static const char * const qdss_gpio7_groups[] = { +static const char * const qdss_gpio_tracedata7_groups[] = { "gpio113", "gpio147", }; -static const char * const qdss_gpio8_groups[] = { +static const char * const qdss_gpio_tracedata8_groups[] = { "gpio114", "gpio150", }; -static const char * const qdss_gpio9_groups[] = { +static const char * const qdss_gpio_tracedata9_groups[] = { "gpio117", "gpio151", }; -static const char * const qlink_big_groups[] = { - "gpio159", "gpio160", +static const char * const qlink_big_enable_groups[] = { + "gpio160", }; -static const char * const qlink_little_groups[] = { - "gpio156", "gpio157", +static const char * const qlink_big_request_groups[] = { + "gpio159", }; -static const char * const qlink_wmss_groups[] = { +static const char * const qlink_little_enable_groups[] = { + "gpio157", +}; +static const char * const qlink_little_request_groups[] = { + "gpio156", +}; +static const char * const qlink_wmss_reset_groups[] = { "gpio158", }; static const char * const qspi0_groups[] = { @@ -1214,58 +1416,223 @@ static const char * const qspi3_groups[] = { static const char * const qspi_clk_groups[] = { "gpio135", }; -static const char * const qspi_cs_groups[] = { +static const char * const qspi_cs_n_groups[] = { "gpio58", "gpio59", }; -static const char * const qup1_se0_groups[] = { - "gpio32", "gpio33", "gpio34", "gpio35", +static const char * const qup1_se0_l0_groups[] = { + "gpio32", }; -static const char * const qup1_se1_groups[] = { - "gpio36", "gpio37", "gpio38", "gpio39", +static const char * const qup1_se0_l1_groups[] = { + "gpio33", }; -static const char * const qup1_se2_groups[] = { - "gpio40", "gpio41", "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", +static const char * const qup1_se0_l2_groups[] = { + "gpio34", }; -static const char * const qup1_se3_groups[] = { - "gpio44", "gpio45", "gpio46", "gpio47", +static const char * const qup1_se0_l3_groups[] = { + "gpio35", }; -static const char * const qup1_se4_groups[] = { - "gpio48", "gpio49", "gpio50", "gpio51", +static const char * const qup1_se1_l0_groups[] = { + "gpio36", }; -static const char * const qup1_se5_groups[] = { - "gpio52", "gpio53", "gpio54", "gpio55", +static const char * const qup1_se1_l1_groups[] = { + "gpio37", }; -static const char * const qup1_se6_groups[] = { - "gpio56", "gpio57", "gpio58", "gpio59", +static const char * const qup1_se1_l2_groups[] = { + "gpio38", }; -static const char * const qup1_se7_groups[] = { - "gpio60", "gpio61", "gpio62", "gpio63", +static const char * const qup1_se1_l3_groups[] = { + "gpio39", }; -static const char * const qup2_se0_groups[] = { - "gpio0", "gpio1", "gpio2", "gpio3", +static const char * const qup1_se2_l0_groups[] = { + "gpio40", }; -static const char * const qup2_se1_groups[] = { - "gpio4", "gpio5", "gpio6", "gpio7", +static const char * const qup1_se2_l1_groups[] = { + "gpio41", }; -static const char * const qup2_se2_groups[] = { - "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio15", +static const char * const qup1_se2_l2_groups[] = { + "gpio42", }; -static const char * const qup2_se3_groups[] = { - "gpio12", "gpio13", "gpio14", "gpio15", +static const char * const qup1_se2_l3_groups[] = { + "gpio43", }; -static const char * const qup2_se4_groups[] = { - "gpio16", "gpio17", "gpio18", "gpio19", +static const char * const qup1_se2_l4_groups[] = { + "gpio44", }; -static const char * const qup2_se5_groups[] = { - "gpio20", "gpio21", "gpio22", "gpio23", +static const char * const qup1_se2_l5_groups[] = { + "gpio45", }; -static const char * const qup2_se6_groups[] = { - "gpio24", "gpio25", "gpio26", "gpio27", +static const char * const qup1_se2_l6_groups[] = { + "gpio46", }; -static const char * const qup2_se7_groups[] = { - "gpio28", "gpio29", "gpio30", "gpio31", +static const char * const qup1_se3_l0_groups[] = { + "gpio44", }; -static const char * const sd_write_groups[] = { +static const char * const qup1_se3_l1_groups[] = { + "gpio45", +}; +static const char * const qup1_se3_l2_groups[] = { + "gpio46", +}; +static const char * const qup1_se3_l3_groups[] = { + "gpio47", +}; +static const char * const qup1_se4_l0_groups[] = { + "gpio48", +}; +static const char * const qup1_se4_l1_groups[] = { + "gpio49", +}; +static const char * const qup1_se4_l2_groups[] = { + "gpio50", +}; +static const char * const qup1_se4_l3_groups[] = { + "gpio51", +}; +static const char * const qup1_se5_l0_groups[] = { + "gpio52", +}; +static const char * const qup1_se5_l1_groups[] = { + "gpio53", +}; +static const char * const qup1_se5_l2_groups[] = { + "gpio54", +}; +static const char * const qup1_se5_l3_groups[] = { + "gpio55", +}; +static const char * const qup1_se6_l0_groups[] = { + "gpio56", +}; +static const char * const qup1_se6_l1_groups[] = { + "gpio57", +}; +static const char * const qup1_se6_l2_groups[] = { + "gpio58", +}; +static const char * const qup1_se6_l3_groups[] = { + "gpio59", +}; +static const char * const qup1_se7_l0_groups[] = { + "gpio60", +}; +static const char * const qup1_se7_l1_groups[] = { + "gpio61", +}; +static const char * const qup1_se7_l2_groups[] = { + "gpio62", +}; +static const char * const qup1_se7_l3_groups[] = { + "gpio63", +}; +static const char * const qup2_se0_l0_groups[] = { + "gpio0", +}; +static const char * const qup2_se0_l1_groups[] = { + "gpio1", +}; +static const char * const qup2_se0_l2_groups[] = { + "gpio2", +}; +static const char * const qup2_se0_l3_groups[] = { + "gpio3", +}; +static const char * const qup2_se1_l0_groups[] = { + "gpio4", +}; +static const char * const qup2_se1_l1_groups[] = { + "gpio5", +}; +static const char * const qup2_se1_l2_groups[] = { + "gpio6", +}; +static const char * const qup2_se1_l3_groups[] = { + "gpio7", +}; +static const char * const qup2_se2_l0_groups[] = { + "gpio8", +}; +static const char * const qup2_se2_l1_groups[] = { + "gpio9", +}; +static const char * const qup2_se2_l2_groups[] = { + "gpio10", +}; +static const char * const qup2_se2_l3_groups[] = { + "gpio11", +}; +static const char * const qup2_se2_l4_groups[] = { + "gpio13", +}; +static const char * const qup2_se2_l5_groups[] = { + "gpio15", +}; +static const char * const qup2_se2_l6_groups[] = { + "gpio12", +}; +static const char * const qup2_se3_l0_groups[] = { + "gpio12", +}; +static const char * const qup2_se3_l1_groups[] = { + "gpio13", +}; +static const char * const qup2_se3_l2_groups[] = { + "gpio14", +}; +static const char * const qup2_se3_l3_groups[] = { + "gpio15", +}; +static const char * const qup2_se4_l0_groups[] = { + "gpio16", +}; +static const char * const qup2_se4_l1_groups[] = { + "gpio17", +}; +static const char * const qup2_se4_l2_groups[] = { + "gpio18", +}; +static const char * const qup2_se4_l3_groups[] = { + "gpio19", +}; +static const char * const qup2_se5_l0_groups[] = { + "gpio20", +}; +static const char * const qup2_se5_l1_groups[] = { + "gpio21", +}; +static const char * const qup2_se5_l2_groups[] = { + "gpio22", +}; +static const char * const qup2_se5_l3_groups[] = { + "gpio23", +}; +static const char * const qup2_se5_l6_groups[] = { + "gpio23", +}; +static const char * const qup2_se6_l0_groups[] = { + "gpio24", +}; +static const char * const qup2_se6_l1_groups[] = { + "gpio25", +}; +static const char * const qup2_se6_l2_groups[] = { + "gpio26", +}; +static const char * const qup2_se6_l3_groups[] = { + "gpio27", +}; +static const char * const qup2_se7_l0_groups[] = { + "gpio28", +}; +static const char * const qup2_se7_l1_groups[] = { + "gpio29", +}; +static const char * const qup2_se7_l2_groups[] = { + "gpio30", +}; +static const char * const qup2_se7_l3_groups[] = { + "gpio31", +}; +static const char * const sd_write_protect_groups[] = { "gpio93", }; static const char * const sdc40_groups[] = { @@ -1286,40 +1653,43 @@ static const char * const sdc4_clk_groups[] = { static const char * const sdc4_cmd_groups[] = { "gpio59", }; -static const char * const tb_trig_groups[] = { - "gpio8", "gpio58", -}; -static const char * const tgu_ch0_groups[] = { +static const char * const tb_trig_sdc2_groups[] = { "gpio8", }; -static const char * const tgu_ch1_groups[] = { +static const char * const tb_trig_sdc4_groups[] = { + "gpio58", +}; +static const char * const tgu_ch0_trigout_groups[] = { + "gpio8", +}; +static const char * const tgu_ch1_trigout_groups[] = { "gpio9", }; -static const char * const tgu_ch2_groups[] = { +static const char * const tgu_ch2_trigout_groups[] = { "gpio10", }; -static const char * const tgu_ch3_groups[] = { +static const char * const tgu_ch3_trigout_groups[] = { "gpio11", }; -static const char * const tmess_prng0_groups[] = { +static const char * const tmess_prng_rosc0_groups[] = { "gpio94", }; -static const char * const tmess_prng1_groups[] = { +static const char * const tmess_prng_rosc1_groups[] = { "gpio95", }; -static const char * const tmess_prng2_groups[] = { +static const char * const tmess_prng_rosc2_groups[] = { "gpio96", }; -static const char * const tmess_prng3_groups[] = { +static const char * const tmess_prng_rosc3_groups[] = { "gpio109", }; -static const char * const tsense_pwm1_groups[] = { +static const char * const tsense_pwm1_out_groups[] = { "gpio58", }; -static const char * const tsense_pwm2_groups[] = { +static const char * const tsense_pwm2_out_groups[] = { "gpio58", }; -static const char * const tsense_pwm3_groups[] = { +static const char * const tsense_pwm3_out_groups[] = { "gpio58", }; static const char * const uim0_clk_groups[] = { @@ -1346,10 +1716,10 @@ static const char * const uim1_present_groups[] = { static const char * const uim1_reset_groups[] = { "gpio136", }; -static const char * const usb1_hs_groups[] = { +static const char * const usb1_hs_ac_groups[] = { "gpio89", }; -static const char * const usb_phy_groups[] = { +static const char * const usb_phy_ps_groups[] = { "gpio29", "gpio54", }; static const char * const vfr_0_groups[] = { @@ -1358,68 +1728,97 @@ static const char * const vfr_0_groups[] = { static const char * const vfr_1_groups[] = { "gpio155", }; -static const char * const vsense_trigger_groups[] = { +static const char * const vsense_trigger_mirnat_groups[] = { "gpio60", }; static const struct msm_function pineapple_functions[] = { FUNCTION(gpio), - FUNCTION(aoss_cti), - FUNCTION(atest_char), - FUNCTION(atest_char0), - FUNCTION(atest_char1), - FUNCTION(atest_char2), - FUNCTION(atest_char3), - FUNCTION(atest_usb0), - FUNCTION(atest_usb00), - FUNCTION(atest_usb01), - FUNCTION(atest_usb02), - FUNCTION(atest_usb03), - FUNCTION(audio_ext), - FUNCTION(audio_ref), - FUNCTION(cam_aon), + FUNCTION(aoss_cti_debug), + FUNCTION(atest_char_start), + FUNCTION(atest_char_status0), + FUNCTION(atest_char_status1), + FUNCTION(atest_char_status2), + FUNCTION(atest_char_status3), + FUNCTION(atest_usb0_atereset), + FUNCTION(atest_usb0_testdataout00), + FUNCTION(atest_usb0_testdataout01), + FUNCTION(atest_usb0_testdataout02), + FUNCTION(atest_usb0_testdataout03), + FUNCTION(audio_ext_mclk0), + FUNCTION(audio_ext_mclk1), + FUNCTION(audio_ref_clk), + FUNCTION(cam_aon_mclk4), FUNCTION(cam_mclk), - FUNCTION(cci_async), - FUNCTION(cci_i2c), + FUNCTION(cci_async_in0), + FUNCTION(cci_async_in1), + FUNCTION(cci_async_in2), + FUNCTION(cci_i2c_scl0), + FUNCTION(cci_i2c_scl1), + FUNCTION(cci_i2c_scl2), + FUNCTION(cci_i2c_scl3), + FUNCTION(cci_i2c_scl4), + FUNCTION(cci_i2c_scl5), + FUNCTION(cci_i2c_sda0), + FUNCTION(cci_i2c_sda1), + FUNCTION(cci_i2c_sda2), + FUNCTION(cci_i2c_sda3), + FUNCTION(cci_i2c_sda4), + FUNCTION(cci_i2c_sda5), FUNCTION(cci_timer0), FUNCTION(cci_timer1), FUNCTION(cci_timer2), FUNCTION(cci_timer3), FUNCTION(cci_timer4), - FUNCTION(cmu_rng0), - FUNCTION(cmu_rng1), - FUNCTION(cmu_rng2), - FUNCTION(cmu_rng3), - FUNCTION(coex_uart1), - FUNCTION(coex_uart2), - FUNCTION(cri_trng), - FUNCTION(dbg_out), - FUNCTION(ddr_bist), - FUNCTION(ddr_pxi0), - FUNCTION(ddr_pxi1), - FUNCTION(ddr_pxi2), - FUNCTION(ddr_pxi3), - FUNCTION(do_not), - FUNCTION(do_not0), - FUNCTION(do_not1), - FUNCTION(do_not2), - FUNCTION(do_not3), - FUNCTION(dp_hot), - FUNCTION(gcc_gp1), - FUNCTION(gcc_gp2), - FUNCTION(gcc_gp3), - FUNCTION(gnss_adc0), - FUNCTION(gnss_adc1), - FUNCTION(i2chub0_se0), - FUNCTION(i2chub0_se1), - FUNCTION(i2chub0_se2), - FUNCTION(i2chub0_se3), - FUNCTION(i2chub0_se4), - FUNCTION(i2chub0_se5), - FUNCTION(i2chub0_se6), - FUNCTION(i2chub0_se7), - FUNCTION(i2chub0_se8), - FUNCTION(i2chub0_se9), + FUNCTION(cmu_rng_entropy0), + FUNCTION(cmu_rng_entropy1), + FUNCTION(cmu_rng_entropy2), + FUNCTION(cmu_rng_entropy3), + FUNCTION(coex_uart1_rx), + FUNCTION(coex_uart1_tx), + FUNCTION(coex_uart2_rx), + FUNCTION(coex_uart2_tx), + FUNCTION(cri_trng_rosc), + FUNCTION(dbg_out_clk), + FUNCTION(ddr_bist_complete), + FUNCTION(ddr_bist_fail), + FUNCTION(ddr_bist_start), + FUNCTION(ddr_bist_stop), + FUNCTION(ddr_pxi0_test), + FUNCTION(ddr_pxi1_test), + FUNCTION(ddr_pxi2_test), + FUNCTION(ddr_pxi3_test), + FUNCTION(do_not_expose), + FUNCTION(do_not_expose0), + FUNCTION(do_not_expose1), + FUNCTION(do_not_expose2), + FUNCTION(do_not_expose3), + FUNCTION(dp_hot_plug), + FUNCTION(gcc_gp1_clk), + FUNCTION(gcc_gp2_clk), + FUNCTION(gcc_gp3_clk), + FUNCTION(gnss_adc_dtest0), + FUNCTION(gnss_adc_dtest1), + FUNCTION(i2chub0_se0_l0), + FUNCTION(i2chub0_se0_l1), + FUNCTION(i2chub0_se1_l0), + FUNCTION(i2chub0_se1_l1), + FUNCTION(i2chub0_se2_l0), + FUNCTION(i2chub0_se2_l1), + FUNCTION(i2chub0_se3_l0), + FUNCTION(i2chub0_se3_l1), + FUNCTION(i2chub0_se4_l0), + FUNCTION(i2chub0_se4_l1), + FUNCTION(i2chub0_se5_l0), + FUNCTION(i2chub0_se5_l1), + FUNCTION(i2chub0_se6_l0), + FUNCTION(i2chub0_se6_l1), + FUNCTION(i2chub0_se7_l0), + FUNCTION(i2chub0_se7_l1), + FUNCTION(i2chub0_se8_l0), + FUNCTION(i2chub0_se8_l1), + FUNCTION(i2chub0_se9_l0), + FUNCTION(i2chub0_se9_l1), FUNCTION(i2s0_data0), FUNCTION(i2s0_data1), FUNCTION(i2s0_sck), @@ -1428,119 +1827,182 @@ static const struct msm_function pineapple_functions[] = { FUNCTION(i2s1_data1), FUNCTION(i2s1_sck), FUNCTION(i2s1_ws), - FUNCTION(ibi_i3c), - FUNCTION(jitter_bist), - FUNCTION(mdp_vsync), - FUNCTION(mdp_vsync0), - FUNCTION(mdp_vsync1), - FUNCTION(mdp_vsync2), - FUNCTION(mdp_vsync3), + FUNCTION(ibi_i3c_qup1), + FUNCTION(ibi_i3c_qup2), + FUNCTION(jitter_bist_ref), + FUNCTION(mdp_vsync0_out), + FUNCTION(mdp_vsync1_out), + FUNCTION(mdp_vsync2_out), + FUNCTION(mdp_vsync3_out), + FUNCTION(mdp_vsync_e), + FUNCTION(mdp_vsync_p), + FUNCTION(mdp_vsync_s), FUNCTION(nav_gpio0), FUNCTION(nav_gpio1), FUNCTION(nav_gpio2), FUNCTION(nav_gpio3), - FUNCTION(pcie0_clk), - FUNCTION(pcie1_clk), - FUNCTION(phase_flag0), - FUNCTION(phase_flag1), - FUNCTION(phase_flag10), - FUNCTION(phase_flag11), - FUNCTION(phase_flag12), - FUNCTION(phase_flag13), - FUNCTION(phase_flag14), - FUNCTION(phase_flag15), - FUNCTION(phase_flag16), - FUNCTION(phase_flag17), - FUNCTION(phase_flag18), - FUNCTION(phase_flag19), - FUNCTION(phase_flag2), - FUNCTION(phase_flag20), - FUNCTION(phase_flag21), - FUNCTION(phase_flag22), - FUNCTION(phase_flag23), - FUNCTION(phase_flag24), - FUNCTION(phase_flag25), - FUNCTION(phase_flag26), - FUNCTION(phase_flag27), - FUNCTION(phase_flag28), - FUNCTION(phase_flag29), - FUNCTION(phase_flag3), - FUNCTION(phase_flag30), - FUNCTION(phase_flag31), - FUNCTION(phase_flag4), - FUNCTION(phase_flag5), - FUNCTION(phase_flag6), - FUNCTION(phase_flag7), - FUNCTION(phase_flag8), - FUNCTION(phase_flag9), - FUNCTION(pll_bist), - FUNCTION(pll_clk), - FUNCTION(prng_rosc0), - FUNCTION(prng_rosc1), - FUNCTION(prng_rosc2), - FUNCTION(prng_rosc3), - FUNCTION(qdss_cti), - FUNCTION(qdss_gpio), - FUNCTION(qdss_gpio0), - FUNCTION(qdss_gpio1), - FUNCTION(qdss_gpio10), - FUNCTION(qdss_gpio11), - FUNCTION(qdss_gpio12), - FUNCTION(qdss_gpio13), - FUNCTION(qdss_gpio14), - FUNCTION(qdss_gpio15), - FUNCTION(qdss_gpio2), - FUNCTION(qdss_gpio3), - FUNCTION(qdss_gpio4), - FUNCTION(qdss_gpio5), - FUNCTION(qdss_gpio6), - FUNCTION(qdss_gpio7), - FUNCTION(qdss_gpio8), - FUNCTION(qdss_gpio9), - FUNCTION(qlink_big), - FUNCTION(qlink_little), - FUNCTION(qlink_wmss), + FUNCTION(pcie0_clk_req), + FUNCTION(pcie1_clk_req), + FUNCTION(phase_flag_status0), + FUNCTION(phase_flag_status1), + FUNCTION(phase_flag_status10), + FUNCTION(phase_flag_status11), + FUNCTION(phase_flag_status12), + FUNCTION(phase_flag_status13), + FUNCTION(phase_flag_status14), + FUNCTION(phase_flag_status15), + FUNCTION(phase_flag_status16), + FUNCTION(phase_flag_status17), + FUNCTION(phase_flag_status18), + FUNCTION(phase_flag_status19), + FUNCTION(phase_flag_status2), + FUNCTION(phase_flag_status20), + FUNCTION(phase_flag_status21), + FUNCTION(phase_flag_status22), + FUNCTION(phase_flag_status23), + FUNCTION(phase_flag_status24), + FUNCTION(phase_flag_status25), + FUNCTION(phase_flag_status26), + FUNCTION(phase_flag_status27), + FUNCTION(phase_flag_status28), + FUNCTION(phase_flag_status29), + FUNCTION(phase_flag_status3), + FUNCTION(phase_flag_status30), + FUNCTION(phase_flag_status31), + FUNCTION(phase_flag_status4), + FUNCTION(phase_flag_status5), + FUNCTION(phase_flag_status6), + FUNCTION(phase_flag_status7), + FUNCTION(phase_flag_status8), + FUNCTION(phase_flag_status9), + FUNCTION(pll_bist_sync), + FUNCTION(pll_clk_aux), + FUNCTION(prng_rosc_test0), + FUNCTION(prng_rosc_test1), + FUNCTION(prng_rosc_test2), + FUNCTION(prng_rosc_test3), + FUNCTION(qdss_cti_trig0), + FUNCTION(qdss_cti_trig1), + FUNCTION(qdss_gpio_traceclk), + FUNCTION(qdss_gpio_tracectl), + FUNCTION(qdss_gpio_tracedata0), + FUNCTION(qdss_gpio_tracedata1), + FUNCTION(qdss_gpio_tracedata10), + FUNCTION(qdss_gpio_tracedata11), + FUNCTION(qdss_gpio_tracedata12), + FUNCTION(qdss_gpio_tracedata13), + FUNCTION(qdss_gpio_tracedata14), + FUNCTION(qdss_gpio_tracedata15), + FUNCTION(qdss_gpio_tracedata2), + FUNCTION(qdss_gpio_tracedata3), + FUNCTION(qdss_gpio_tracedata4), + FUNCTION(qdss_gpio_tracedata5), + FUNCTION(qdss_gpio_tracedata6), + FUNCTION(qdss_gpio_tracedata7), + FUNCTION(qdss_gpio_tracedata8), + FUNCTION(qdss_gpio_tracedata9), + FUNCTION(qlink_big_enable), + FUNCTION(qlink_big_request), + FUNCTION(qlink_little_enable), + FUNCTION(qlink_little_request), + FUNCTION(qlink_wmss_reset), FUNCTION(qspi0), FUNCTION(qspi1), FUNCTION(qspi2), FUNCTION(qspi3), FUNCTION(qspi_clk), - FUNCTION(qspi_cs), - FUNCTION(qup1_se0), - FUNCTION(qup1_se1), - FUNCTION(qup1_se2), - FUNCTION(qup1_se3), - FUNCTION(qup1_se4), - FUNCTION(qup1_se5), - FUNCTION(qup1_se6), - FUNCTION(qup1_se7), - FUNCTION(qup2_se0), - FUNCTION(qup2_se1), - FUNCTION(qup2_se2), - FUNCTION(qup2_se3), - FUNCTION(qup2_se4), - FUNCTION(qup2_se5), - FUNCTION(qup2_se6), - FUNCTION(qup2_se7), - FUNCTION(sd_write), + FUNCTION(qspi_cs_n), + FUNCTION(qup1_se0_l0), + FUNCTION(qup1_se0_l1), + FUNCTION(qup1_se0_l2), + FUNCTION(qup1_se0_l3), + FUNCTION(qup1_se1_l0), + FUNCTION(qup1_se1_l1), + FUNCTION(qup1_se1_l2), + FUNCTION(qup1_se1_l3), + FUNCTION(qup1_se2_l0), + FUNCTION(qup1_se2_l1), + FUNCTION(qup1_se2_l2), + FUNCTION(qup1_se2_l3), + FUNCTION(qup1_se2_l4), + FUNCTION(qup1_se2_l5), + FUNCTION(qup1_se2_l6), + FUNCTION(qup1_se3_l0), + FUNCTION(qup1_se3_l1), + FUNCTION(qup1_se3_l2), + FUNCTION(qup1_se3_l3), + FUNCTION(qup1_se4_l0), + FUNCTION(qup1_se4_l1), + FUNCTION(qup1_se4_l2), + FUNCTION(qup1_se4_l3), + FUNCTION(qup1_se5_l0), + FUNCTION(qup1_se5_l1), + FUNCTION(qup1_se5_l2), + FUNCTION(qup1_se5_l3), + FUNCTION(qup1_se6_l0), + FUNCTION(qup1_se6_l1), + FUNCTION(qup1_se6_l2), + FUNCTION(qup1_se6_l3), + FUNCTION(qup1_se7_l0), + FUNCTION(qup1_se7_l1), + FUNCTION(qup1_se7_l2), + FUNCTION(qup1_se7_l3), + FUNCTION(qup2_se0_l0), + FUNCTION(qup2_se0_l1), + FUNCTION(qup2_se0_l2), + FUNCTION(qup2_se0_l3), + FUNCTION(qup2_se1_l0), + FUNCTION(qup2_se1_l1), + FUNCTION(qup2_se1_l2), + FUNCTION(qup2_se1_l3), + FUNCTION(qup2_se2_l0), + FUNCTION(qup2_se2_l1), + FUNCTION(qup2_se2_l2), + FUNCTION(qup2_se2_l3), + FUNCTION(qup2_se2_l4), + FUNCTION(qup2_se2_l5), + FUNCTION(qup2_se2_l6), + FUNCTION(qup2_se3_l0), + FUNCTION(qup2_se3_l1), + FUNCTION(qup2_se3_l2), + FUNCTION(qup2_se3_l3), + FUNCTION(qup2_se4_l0), + FUNCTION(qup2_se4_l1), + FUNCTION(qup2_se4_l2), + FUNCTION(qup2_se4_l3), + FUNCTION(qup2_se5_l0), + FUNCTION(qup2_se5_l1), + FUNCTION(qup2_se5_l2), + FUNCTION(qup2_se5_l3), + FUNCTION(qup2_se5_l6), + FUNCTION(qup2_se6_l0), + FUNCTION(qup2_se6_l1), + FUNCTION(qup2_se6_l2), + FUNCTION(qup2_se6_l3), + FUNCTION(qup2_se7_l0), + FUNCTION(qup2_se7_l1), + FUNCTION(qup2_se7_l2), + FUNCTION(qup2_se7_l3), + FUNCTION(sd_write_protect), FUNCTION(sdc40), FUNCTION(sdc41), FUNCTION(sdc42), FUNCTION(sdc43), FUNCTION(sdc4_clk), FUNCTION(sdc4_cmd), - FUNCTION(tb_trig), - FUNCTION(tgu_ch0), - FUNCTION(tgu_ch1), - FUNCTION(tgu_ch2), - FUNCTION(tgu_ch3), - FUNCTION(tmess_prng0), - FUNCTION(tmess_prng1), - FUNCTION(tmess_prng2), - FUNCTION(tmess_prng3), - FUNCTION(tsense_pwm1), - FUNCTION(tsense_pwm2), - FUNCTION(tsense_pwm3), + FUNCTION(tb_trig_sdc2), + FUNCTION(tb_trig_sdc4), + FUNCTION(tgu_ch0_trigout), + FUNCTION(tgu_ch1_trigout), + FUNCTION(tgu_ch2_trigout), + FUNCTION(tgu_ch3_trigout), + FUNCTION(tmess_prng_rosc0), + FUNCTION(tmess_prng_rosc1), + FUNCTION(tmess_prng_rosc2), + FUNCTION(tmess_prng_rosc3), + FUNCTION(tsense_pwm1_out), + FUNCTION(tsense_pwm2_out), + FUNCTION(tsense_pwm3_out), FUNCTION(uim0_clk), FUNCTION(uim0_data), FUNCTION(uim0_present), @@ -1549,11 +2011,11 @@ static const struct msm_function pineapple_functions[] = { FUNCTION(uim1_data), FUNCTION(uim1_present), FUNCTION(uim1_reset), - FUNCTION(usb1_hs), - FUNCTION(usb_phy), + FUNCTION(usb1_hs_ac), + FUNCTION(usb_phy_ps), FUNCTION(vfr_0), FUNCTION(vfr_1), - FUNCTION(vsense_trigger), + FUNCTION(vsense_trigger_mirnat), }; /* Every pin is maintained as a single group, and missing or non-existing pin @@ -1562,293 +2024,354 @@ static const struct msm_function pineapple_functions[] = { * Clients would not be able to request these dummy pin groups. */ static const struct msm_pingroup pineapple_groups[] = { - [0] = PINGROUP(0, qup2_se0, ibi_i3c, phase_flag0, NA, NA, NA, NA, NA, - NA, 0, -1), - [1] = PINGROUP(1, qup2_se0, ibi_i3c, phase_flag1, NA, NA, NA, NA, NA, - NA, 0, -1), - [2] = PINGROUP(2, qup2_se0, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2000, 0), - [3] = PINGROUP(3, qup2_se0, phase_flag2, NA, qdss_gpio6, NA, NA, NA, - NA, NA, 0xD2000, 1), - [4] = PINGROUP(4, qup2_se1, ibi_i3c, phase_flag3, NA, NA, NA, NA, NA, - NA, 0, -1), - [5] = PINGROUP(5, qup2_se1, ibi_i3c, phase_flag4, NA, NA, NA, NA, NA, - NA, 0, -1), - [6] = PINGROUP(6, qup2_se1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [7] = PINGROUP(7, qup2_se1, phase_flag5, NA, qdss_gpio15, NA, NA, NA, - NA, NA, 0xD2000, 2), - [8] = PINGROUP(8, qup2_se2, ibi_i3c, tb_trig, phase_flag6, tgu_ch0, NA, - qdss_gpio4, NA, NA, 0xD2000, 3), - [9] = PINGROUP(9, qup2_se2, ibi_i3c, phase_flag7, tgu_ch1, NA, NA, NA, - NA, NA, 0, -1), - [10] = PINGROUP(10, qup2_se2, cci_timer2, tgu_ch2, NA, NA, NA, NA, NA, - NA, 0xD2000, 4), - [11] = PINGROUP(11, qup2_se2, cci_timer3, phase_flag8, tgu_ch3, NA, NA, - NA, NA, NA, 0xD2000, 5), - [12] = PINGROUP(12, qup2_se3, cci_i2c, ibi_i3c, qup2_se2, phase_flag9, - NA, NA, NA, NA, 0xD2000, 6), - [13] = PINGROUP(13, qup2_se3, cci_i2c, ibi_i3c, qup2_se2, phase_flag18, - NA, qdss_gpio13, NA, NA, 0xD2000, 7), - [14] = PINGROUP(14, qup2_se3, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2000, 8), - [15] = PINGROUP(15, qup2_se3, cci_async, qup2_se2, phase_flag10, NA, - qdss_gpio14, NA, NA, NA, 0xD2000, 9), - [16] = PINGROUP(16, qup2_se4, phase_flag11, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [17] = PINGROUP(17, qup2_se4, phase_flag12, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [18] = PINGROUP(18, qup2_se4, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [19] = PINGROUP(19, qup2_se4, phase_flag13, NA, NA, NA, NA, NA, NA, NA, 0xD2000, 10), - [20] = PINGROUP(20, qup2_se5, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [21] = PINGROUP(21, qup2_se5, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2000, 11), - [22] = PINGROUP(22, qup2_se5, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [23] = PINGROUP(23, qup2_se5, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2000, 12), - [24] = PINGROUP(24, qup2_se6, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [25] = PINGROUP(25, qup2_se6, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [26] = PINGROUP(26, qup2_se6, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2000, 13), - [27] = PINGROUP(27, qup2_se6, qdss_cti, NA, NA, NA, NA, NA, NA, NA, 0xD2000, 14), - [28] = PINGROUP(28, qup2_se7, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2014, 0), - [29] = PINGROUP(29, qup2_se7, usb_phy, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [30] = PINGROUP(30, qup2_se7, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [31] = PINGROUP(31, qup2_se7, qdss_cti, NA, NA, NA, NA, NA, NA, NA, 0xD2014, 1), - [32] = PINGROUP(32, qup1_se0, ibi_i3c, NA, NA, NA, NA, NA, NA, NA, 0xD2014, 2), - [33] = PINGROUP(33, qup1_se0, ibi_i3c, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [34] = PINGROUP(34, qup1_se0, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2014, 3), - [35] = PINGROUP(35, qup1_se0, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2014, 4), - [36] = PINGROUP(36, qup1_se1, do_not0, ibi_i3c, NA, NA, NA, NA, NA, NA, 0xD2014, 5), - [37] = PINGROUP(37, qup1_se1, do_not1, ibi_i3c, NA, NA, NA, NA, NA, NA, 0, -1), - [38] = PINGROUP(38, qup1_se1, do_not2, NA, NA, NA, NA, NA, NA, NA, 0xD2014, 6), - [39] = PINGROUP(39, qup1_se1, do_not3, NA, NA, NA, NA, NA, NA, NA, 0xD2014, 7), - [40] = PINGROUP(40, qup1_se2, ddr_bist, NA, NA, NA, NA, NA, NA, NA, 0xD2014, 8), - [41] = PINGROUP(41, qup1_se2, ddr_bist, NA, NA, NA, NA, NA, NA, NA, 0xD2014, 9), - [42] = PINGROUP(42, qup1_se2, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [43] = PINGROUP(43, qup1_se2, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2014, 10), - [44] = PINGROUP(44, qup1_se3, qup1_se2, ddr_bist, ddr_pxi1, NA, NA, NA, - NA, NA, 0xD2014, 11), - [45] = PINGROUP(45, qup1_se3, qup1_se2, ddr_bist, ddr_pxi1, NA, NA, NA, - NA, NA, 0xD2014, 12), - [46] = PINGROUP(46, qup1_se3, qup1_se2, ddr_pxi3, NA, NA, NA, NA, NA, - NA, 0xD2014, 13), - [47] = PINGROUP(47, qup1_se3, uim0_present, dp_hot, ddr_pxi3, NA, NA, - NA, NA, NA, 0xD2014, 14), - [48] = PINGROUP(48, qup1_se4, ibi_i3c, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [49] = PINGROUP(49, qup1_se4, ibi_i3c, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [50] = PINGROUP(50, qup1_se4, aoss_cti, NA, NA, NA, NA, NA, NA, NA, 0xD2014, 15), - [51] = PINGROUP(51, qup1_se4, aoss_cti, ddr_pxi2, NA, NA, NA, NA, NA, - NA, 0xD2018, 0), - [52] = PINGROUP(52, qup1_se5, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [53] = PINGROUP(53, qup1_se5, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [54] = PINGROUP(54, qup1_se5, usb_phy, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [55] = PINGROUP(55, qup1_se5, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2018, 1), - [56] = PINGROUP(56, qup1_se6, ibi_i3c, qspi2, sdc42, NA, NA, NA, NA, - NA, 0xD200C, 3), - [57] = PINGROUP(57, qup1_se6, ibi_i3c, qspi3, sdc43, NA, NA, NA, NA, + [0] = PINGROUP(0, qup2_se0_l0, ibi_i3c_qup2, phase_flag_status0, NA, + NA, NA, NA, NA, NA, 0, -1), + [1] = PINGROUP(1, qup2_se0_l1, ibi_i3c_qup2, phase_flag_status1, NA, + NA, NA, NA, NA, NA, 0, -1), + [2] = PINGROUP(2, qup2_se0_l2, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [3] = PINGROUP(3, qup2_se0_l3, phase_flag_status2, NA, + qdss_gpio_tracedata6, NA, NA, NA, NA, NA, 0, -1), + [4] = PINGROUP(4, qup2_se1_l0, ibi_i3c_qup2, phase_flag_status3, NA, + NA, NA, NA, NA, NA, 0, -1), + [5] = PINGROUP(5, qup2_se1_l1, ibi_i3c_qup2, phase_flag_status4, NA, + NA, NA, NA, NA, NA, 0, -1), + [6] = PINGROUP(6, qup2_se1_l2, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [7] = PINGROUP(7, qup2_se1_l3, phase_flag_status5, NA, + qdss_gpio_tracedata15, NA, NA, NA, NA, NA, 0, -1), + [8] = PINGROUP(8, qup2_se2_l0, ibi_i3c_qup2, tb_trig_sdc2, + phase_flag_status6, tgu_ch0_trigout, NA, + qdss_gpio_tracedata4, NA, NA, 0, -1), + [9] = PINGROUP(9, qup2_se2_l1, ibi_i3c_qup2, phase_flag_status7, + tgu_ch1_trigout, NA, NA, NA, NA, NA, 0, -1), + [10] = PINGROUP(10, qup2_se2_l2, cci_timer2, tgu_ch2_trigout, NA, NA, + NA, NA, NA, NA, 0, -1), + [11] = PINGROUP(11, qup2_se2_l3, cci_timer3, phase_flag_status8, + tgu_ch3_trigout, NA, NA, NA, NA, NA, 0, -1), + [12] = PINGROUP(12, qup2_se3_l0, cci_i2c_sda3, ibi_i3c_qup2, + qup2_se2_l6, phase_flag_status9, NA, NA, NA, NA, 0, -1), + [13] = PINGROUP(13, qup2_se3_l1, cci_i2c_scl3, ibi_i3c_qup2, + qup2_se2_l4, phase_flag_status18, NA, + qdss_gpio_tracedata13, NA, NA, 0, -1), + [14] = PINGROUP(14, qup2_se3_l2, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [15] = PINGROUP(15, qup2_se3_l3, cci_async_in0, qup2_se2_l5, + phase_flag_status10, NA, qdss_gpio_tracedata14, NA, NA, NA, 0, -1), - [58] = PINGROUP(58, qup1_se6, qspi_cs, tb_trig, tsense_pwm1, - tsense_pwm2, tsense_pwm3, NA, NA, NA, 0, -1), - [59] = PINGROUP(59, qup1_se6, uim1_present, qspi_cs, sdc4_cmd, NA, NA, - NA, NA, NA, 0xD200C, 4), - [60] = PINGROUP(60, qup1_se7, aoss_cti, vsense_trigger, NA, NA, NA, NA, - NA, NA, 0xD200C, 5), - [61] = PINGROUP(61, qup1_se7, aoss_cti, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [62] = PINGROUP(62, qup1_se7, ddr_pxi2, NA, NA, NA, NA, NA, NA, NA, 0xD200C, 6), - [63] = PINGROUP(63, qup1_se7, NA, NA, NA, NA, NA, NA, NA, NA, 0xD200C, 7), - [64] = PINGROUP(64, i2chub0_se0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [65] = PINGROUP(65, i2chub0_se0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [66] = PINGROUP(66, i2chub0_se1, NA, NA, NA, NA, NA, NA, NA, NA, 0xD200C, 8), - [67] = PINGROUP(67, i2chub0_se1, NA, NA, NA, NA, NA, NA, NA, NA, 0xD200C, 9), - [68] = PINGROUP(68, i2chub0_se2, pll_bist, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [69] = PINGROUP(69, i2chub0_se2, NA, NA, NA, NA, NA, NA, NA, NA, 0xD200C, 10), - [70] = PINGROUP(70, i2chub0_se3, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [71] = PINGROUP(71, i2chub0_se3, NA, atest_usb02, NA, NA, NA, NA, NA, - NA, 0xD200C, 11), - [72] = PINGROUP(72, i2chub0_se4, NA, atest_usb03, NA, NA, NA, NA, NA, - NA, 0, -1), - [73] = PINGROUP(73, i2chub0_se4, jitter_bist, NA, NA, NA, NA, NA, NA, - NA, 0, -1), - [74] = PINGROUP(74, i2chub0_se5, atest_usb0, NA, NA, NA, NA, NA, NA, - NA, 0, -1), - [75] = PINGROUP(75, i2chub0_se5, ddr_pxi0, NA, NA, NA, NA, NA, NA, NA, 0xD200C, 12), - [76] = PINGROUP(76, i2chub0_se6, ddr_pxi0, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [77] = PINGROUP(77, i2chub0_se6, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [78] = PINGROUP(78, i2chub0_se7, qdss_cti, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [79] = PINGROUP(79, i2chub0_se7, qdss_cti, NA, NA, NA, NA, NA, NA, NA, 0xD200C, 13), - [80] = PINGROUP(80, i2chub0_se9, NA, NA, NA, NA, NA, NA, NA, NA, 0xD200C, 14), - [81] = PINGROUP(81, i2chub0_se9, NA, NA, NA, NA, NA, NA, NA, NA, 0xD200C, 15), - [82] = PINGROUP(82, qdss_cti, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2010, 0), - [83] = PINGROUP(83, qdss_cti, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2010, 1), - [84] = PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 0), - [85] = PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 1), - [86] = PINGROUP(86, mdp_vsync, mdp_vsync0, mdp_vsync1, gcc_gp1, NA, NA, - NA, NA, NA, 0xD2018, 2), - [87] = PINGROUP(87, mdp_vsync, mdp_vsync2, mdp_vsync3, gcc_gp2, NA, NA, - NA, NA, NA, 0xD2018, 3), - [88] = PINGROUP(88, mdp_vsync, gcc_gp3, NA, NA, NA, NA, NA, NA, NA, 0xD2018, 4), - [89] = PINGROUP(89, usb1_hs, gnss_adc0, NA, NA, NA, NA, NA, NA, NA, 0xD2018, 5), - [90] = PINGROUP(90, gnss_adc1, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2018, 6), - [91] = PINGROUP(91, NA, gnss_adc0, NA, NA, NA, NA, NA, NA, NA, 0xD2018, 7), - [92] = PINGROUP(92, dbg_out, gnss_adc1, NA, NA, NA, NA, NA, NA, NA, 0xD2010, 2), - [93] = PINGROUP(93, sd_write, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [94] = PINGROUP(94, cmu_rng0, phase_flag14, tmess_prng0, NA, NA, NA, + [16] = PINGROUP(16, qup2_se4_l0, phase_flag_status11, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [95] = PINGROUP(95, pcie0_clk, cmu_rng1, phase_flag15, tmess_prng1, NA, - NA, NA, NA, NA, 0xD2010, 3), - [96] = PINGROUP(96, cmu_rng2, phase_flag16, tmess_prng2, NA, NA, NA, - NA, NA, NA, 0xD2010, 4), + [17] = PINGROUP(17, qup2_se4_l1, phase_flag_status12, NA, NA, NA, NA, + NA, NA, NA, 0, -1), + [18] = PINGROUP(18, qup2_se4_l2, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [19] = PINGROUP(19, qup2_se4_l3, phase_flag_status13, NA, NA, NA, NA, + NA, NA, NA, 0, -1), + [20] = PINGROUP(20, qup2_se5_l0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [21] = PINGROUP(21, qup2_se5_l1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [22] = PINGROUP(22, qup2_se5_l2, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [23] = PINGROUP(23, qup2_se5_l3, qup2_se5_l6, NA, NA, NA, NA, NA, NA, + NA, 0, -1), + [24] = PINGROUP(24, qup2_se6_l0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [25] = PINGROUP(25, qup2_se6_l1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [26] = PINGROUP(26, qup2_se6_l2, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [27] = PINGROUP(27, qup2_se6_l3, qdss_cti_trig1, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [28] = PINGROUP(28, qup2_se7_l0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [29] = PINGROUP(29, qup2_se7_l1, usb_phy_ps, NA, NA, NA, NA, NA, NA, + NA, 0, -1), + [30] = PINGROUP(30, qup2_se7_l2, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [31] = PINGROUP(31, qup2_se7_l3, qdss_cti_trig0, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [32] = PINGROUP(32, qup1_se0_l0, ibi_i3c_qup1, NA, NA, NA, NA, NA, NA, + NA, 0, -1), + [33] = PINGROUP(33, qup1_se0_l1, ibi_i3c_qup1, NA, NA, NA, NA, NA, NA, + NA, 0, -1), + [34] = PINGROUP(34, qup1_se0_l2, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [35] = PINGROUP(35, qup1_se0_l3, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [36] = PINGROUP(36, qup1_se1_l0, do_not_expose0, ibi_i3c_qup1, NA, NA, + NA, NA, NA, NA, 0, -1), + [37] = PINGROUP(37, qup1_se1_l1, do_not_expose1, ibi_i3c_qup1, NA, NA, + NA, NA, NA, NA, 0, -1), + [38] = PINGROUP(38, qup1_se1_l2, do_not_expose2, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [39] = PINGROUP(39, qup1_se1_l3, do_not_expose3, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [40] = PINGROUP(40, qup1_se2_l0, ddr_bist_fail, NA, NA, NA, NA, NA, NA, + NA, 0, -1), + [41] = PINGROUP(41, qup1_se2_l1, ddr_bist_start, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [42] = PINGROUP(42, qup1_se2_l2, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [43] = PINGROUP(43, qup1_se2_l3, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [44] = PINGROUP(44, qup1_se3_l0, qup1_se2_l4, ddr_bist_complete, + ddr_pxi1_test, NA, NA, NA, NA, NA, 0, -1), + [45] = PINGROUP(45, qup1_se3_l1, qup1_se2_l5, ddr_bist_stop, + ddr_pxi1_test, NA, NA, NA, NA, NA, 0, -1), + [46] = PINGROUP(46, qup1_se3_l2, qup1_se2_l6, ddr_pxi3_test, NA, NA, + NA, NA, NA, NA, 0, -1), + [47] = PINGROUP(47, qup1_se3_l3, uim0_present, dp_hot_plug, + ddr_pxi3_test, NA, NA, NA, NA, NA, 0, -1), + [48] = PINGROUP(48, qup1_se4_l0, ibi_i3c_qup1, NA, NA, NA, NA, NA, NA, + NA, 0, -1), + [49] = PINGROUP(49, qup1_se4_l1, ibi_i3c_qup1, NA, NA, NA, NA, NA, NA, + NA, 0, -1), + [50] = PINGROUP(50, qup1_se4_l2, aoss_cti_debug, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [51] = PINGROUP(51, qup1_se4_l3, aoss_cti_debug, ddr_pxi2_test, NA, NA, + NA, NA, NA, NA, 0, -1), + [52] = PINGROUP(52, qup1_se5_l0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [53] = PINGROUP(53, qup1_se5_l1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [54] = PINGROUP(54, qup1_se5_l2, usb_phy_ps, NA, NA, NA, NA, NA, NA, + NA, 0, -1), + [55] = PINGROUP(55, qup1_se5_l3, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [56] = PINGROUP(56, qup1_se6_l0, ibi_i3c_qup1, qspi2, sdc42, NA, NA, + NA, NA, NA, 0, -1), + [57] = PINGROUP(57, qup1_se6_l1, ibi_i3c_qup1, qspi3, sdc43, NA, NA, + NA, NA, NA, 0, -1), + [58] = PINGROUP(58, qup1_se6_l2, qspi_cs_n, tb_trig_sdc4, + tsense_pwm1_out, tsense_pwm2_out, tsense_pwm3_out, NA, + NA, NA, 0, -1), + [59] = PINGROUP(59, qup1_se6_l3, uim1_present, qspi_cs_n, sdc4_cmd, NA, + NA, NA, NA, NA, 0, -1), + [60] = PINGROUP(60, qup1_se7_l0, aoss_cti_debug, vsense_trigger_mirnat, + NA, NA, NA, NA, NA, NA, 0, -1), + [61] = PINGROUP(61, qup1_se7_l1, aoss_cti_debug, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [62] = PINGROUP(62, qup1_se7_l2, ddr_pxi2_test, NA, NA, NA, NA, NA, NA, + NA, 0, -1), + [63] = PINGROUP(63, qup1_se7_l3, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [64] = PINGROUP(64, i2chub0_se0_l0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [65] = PINGROUP(65, i2chub0_se0_l1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [66] = PINGROUP(66, i2chub0_se1_l0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [67] = PINGROUP(67, i2chub0_se1_l1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [68] = PINGROUP(68, i2chub0_se2_l0, pll_bist_sync, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [69] = PINGROUP(69, i2chub0_se2_l1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [70] = PINGROUP(70, i2chub0_se3_l0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [71] = PINGROUP(71, i2chub0_se3_l1, NA, atest_usb0_testdataout02, NA, + NA, NA, NA, NA, NA, 0, -1), + [72] = PINGROUP(72, i2chub0_se4_l0, NA, atest_usb0_testdataout03, NA, + NA, NA, NA, NA, NA, 0, -1), + [73] = PINGROUP(73, i2chub0_se4_l1, jitter_bist_ref, NA, NA, NA, NA, + NA, NA, NA, 0, -1), + [74] = PINGROUP(74, i2chub0_se5_l0, atest_usb0_atereset, NA, NA, NA, + NA, NA, NA, NA, 0, -1), + [75] = PINGROUP(75, i2chub0_se5_l1, ddr_pxi0_test, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [76] = PINGROUP(76, i2chub0_se6_l0, ddr_pxi0_test, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [77] = PINGROUP(77, i2chub0_se6_l1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [78] = PINGROUP(78, i2chub0_se7_l0, qdss_cti_trig0, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [79] = PINGROUP(79, i2chub0_se7_l1, qdss_cti_trig1, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [80] = PINGROUP(80, i2chub0_se9_l0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [81] = PINGROUP(81, i2chub0_se9_l1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [82] = PINGROUP(82, qdss_cti_trig0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [83] = PINGROUP(83, qdss_cti_trig1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [84] = PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [85] = PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [86] = PINGROUP(86, mdp_vsync_p, mdp_vsync0_out, mdp_vsync1_out, + gcc_gp1_clk, NA, NA, NA, NA, NA, 0, -1), + [87] = PINGROUP(87, mdp_vsync_s, mdp_vsync2_out, mdp_vsync3_out, + gcc_gp2_clk, NA, NA, NA, NA, NA, 0, -1), + [88] = PINGROUP(88, mdp_vsync_e, gcc_gp3_clk, NA, NA, NA, NA, NA, NA, + NA, 0, -1), + [89] = PINGROUP(89, usb1_hs_ac, gnss_adc_dtest0, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [90] = PINGROUP(90, gnss_adc_dtest1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [91] = PINGROUP(91, NA, gnss_adc_dtest0, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [92] = PINGROUP(92, dbg_out_clk, gnss_adc_dtest1, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [93] = PINGROUP(93, sd_write_protect, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [94] = PINGROUP(94, cmu_rng_entropy0, phase_flag_status14, + tmess_prng_rosc0, NA, NA, NA, NA, NA, NA, 0, -1), + [95] = PINGROUP(95, pcie0_clk_req, cmu_rng_entropy1, + phase_flag_status15, tmess_prng_rosc1, NA, NA, NA, NA, + NA, 0, -1), + [96] = PINGROUP(96, cmu_rng_entropy2, phase_flag_status16, + tmess_prng_rosc2, NA, NA, NA, NA, NA, NA, 0, -1), [97] = PINGROUP(97, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [98] = PINGROUP(98, pcie1_clk, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2010, 5), - [99] = PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2010, 6), - [100] = PINGROUP(100, cam_mclk, qdss_gpio11, NA, NA, NA, NA, NA, NA, + [98] = PINGROUP(98, pcie1_clk_req, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [99] = PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [100] = PINGROUP(100, cam_mclk, qdss_gpio_tracedata11, NA, NA, NA, NA, + NA, NA, NA, 0, -1), + [101] = PINGROUP(101, cam_mclk, qdss_gpio_tracedata12, NA, NA, NA, NA, + NA, NA, NA, 0, -1), + [102] = PINGROUP(102, cam_mclk, qdss_gpio_tracedata0, NA, NA, NA, NA, + NA, NA, NA, 0, -1), + [103] = PINGROUP(103, cam_mclk, qdss_gpio_tracedata1, NA, NA, NA, NA, + NA, NA, NA, 0, -1), + [104] = PINGROUP(104, cam_aon_mclk4, qdss_gpio_tracedata2, NA, NA, NA, + NA, NA, NA, NA, 0, -1), + [105] = PINGROUP(105, cam_mclk, qdss_gpio_tracedata3, NA, NA, NA, NA, + NA, NA, NA, 0, -1), + [106] = PINGROUP(106, cam_mclk, pll_clk_aux, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [101] = PINGROUP(101, cam_mclk, qdss_gpio12, NA, NA, NA, NA, NA, NA, - NA, 0, -1), - [102] = PINGROUP(102, cam_mclk, qdss_gpio0, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [103] = PINGROUP(103, cam_mclk, qdss_gpio1, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [104] = PINGROUP(104, cam_aon, qdss_gpio2, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [105] = PINGROUP(105, cam_mclk, qdss_gpio3, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [106] = PINGROUP(106, cam_mclk, pll_clk, NA, NA, NA, NA, NA, NA, NA, 0, -1), [107] = PINGROUP(107, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [108] = PINGROUP(108, cam_mclk, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [109] = PINGROUP(109, cci_timer0, phase_flag17, tmess_prng3, NA, NA, - NA, NA, NA, NA, 0, -1), + [109] = PINGROUP(109, cci_timer0, phase_flag_status17, + tmess_prng_rosc3, NA, NA, NA, NA, NA, NA, 0, -1), [110] = PINGROUP(110, cci_timer1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [111] = PINGROUP(111, cci_timer4, phase_flag19, NA, NA, NA, NA, NA, NA, - NA, 0, -1), - [112] = PINGROUP(112, cci_i2c, cmu_rng3, phase_flag20, NA, NA, NA, NA, - NA, NA, 0, -1), - [113] = PINGROUP(113, cci_i2c, phase_flag21, NA, qdss_gpio7, NA, NA, + [111] = PINGROUP(111, cci_timer4, phase_flag_status19, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [114] = PINGROUP(114, cci_i2c, phase_flag22, NA, qdss_gpio8, NA, NA, - NA, NA, NA, 0, -1), - [115] = PINGROUP(115, cci_i2c, phase_flag23, NA, qdss_gpio, NA, NA, NA, - NA, NA, 0xD2010, 7), - [116] = PINGROUP(116, cci_i2c, phase_flag24, NA, qdss_gpio, NA, NA, NA, - NA, NA, 0xD2010, 8), - [117] = PINGROUP(117, cci_i2c, phase_flag25, NA, qdss_gpio9, NA, NA, - NA, NA, NA, 0xD2010, 9), - [118] = PINGROUP(118, cci_i2c, phase_flag26, NA, qdss_gpio10, NA, NA, - NA, NA, NA, 0xD2010, 10), - [119] = PINGROUP(119, cci_i2c, phase_flag27, NA, NA, NA, NA, NA, NA, - NA, 0xD2010, 11), - [120] = PINGROUP(120, cci_i2c, phase_flag28, NA, NA, NA, NA, NA, NA, - NA, 0, -1), - [121] = PINGROUP(121, i2s1_sck, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [122] = PINGROUP(122, i2s1_data0, cmu_rng3, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [123] = PINGROUP(123, i2s1_ws, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [124] = PINGROUP(124, i2s1_data1, audio_ext, audio_ref, NA, NA, NA, NA, - NA, NA, 0, -1), - [125] = PINGROUP(125, audio_ext, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [126] = PINGROUP(126, i2s0_sck, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [127] = PINGROUP(127, i2s0_data0, cmu_rng2, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [128] = PINGROUP(128, i2s0_data1, cmu_rng1, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [129] = PINGROUP(129, i2s0_ws, cmu_rng0, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [130] = PINGROUP(130, uim0_data, atest_usb01, atest_char3, NA, NA, NA, - NA, NA, NA, 0, -1), - [131] = PINGROUP(131, uim0_clk, atest_usb00, atest_char2, NA, NA, NA, - NA, NA, NA, 0, -1), - [132] = PINGROUP(132, uim0_reset, atest_char1, NA, NA, NA, NA, NA, NA, - NA, 0, -1), - [133] = PINGROUP(133, mdp_vsync, atest_char0, NA, NA, NA, NA, NA, NA, - NA, 0xD2010, 12), - [134] = PINGROUP(134, uim1_data, do_not, qspi0, sdc40, gcc_gp1, NA, NA, - NA, NA, 0, -1), - [135] = PINGROUP(135, uim1_clk, do_not, qspi_clk, sdc4_clk, gcc_gp2, + [112] = PINGROUP(112, cci_i2c_sda4, cmu_rng_entropy3, + phase_flag_status20, NA, NA, NA, NA, NA, NA, 0, -1), + [113] = PINGROUP(113, cci_i2c_sda0, phase_flag_status21, NA, + qdss_gpio_tracedata7, NA, NA, NA, NA, NA, 0, -1), + [114] = PINGROUP(114, cci_i2c_scl0, phase_flag_status22, NA, + qdss_gpio_tracedata8, NA, NA, NA, NA, NA, 0, -1), + [115] = PINGROUP(115, cci_i2c_sda1, phase_flag_status23, NA, + qdss_gpio_traceclk, NA, NA, NA, NA, NA, 0, -1), + [116] = PINGROUP(116, cci_i2c_scl1, phase_flag_status24, NA, + qdss_gpio_tracectl, NA, NA, NA, NA, NA, 0, -1), + [117] = PINGROUP(117, cci_i2c_sda2, phase_flag_status25, NA, + qdss_gpio_tracedata9, NA, NA, NA, NA, NA, 0, -1), + [118] = PINGROUP(118, cci_i2c_scl2, phase_flag_status26, NA, + qdss_gpio_tracedata10, NA, NA, NA, NA, NA, 0, -1), + [119] = PINGROUP(119, cci_i2c_sda5, phase_flag_status27, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [136] = PINGROUP(136, uim1_reset, do_not, qspi1, sdc41, gcc_gp3, NA, + [120] = PINGROUP(120, cci_i2c_scl5, phase_flag_status28, NA, NA, NA, + NA, NA, NA, NA, 0, -1), + [121] = PINGROUP(121, i2s1_sck, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [122] = PINGROUP(122, i2s1_data0, cmu_rng_entropy3, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [123] = PINGROUP(123, i2s1_ws, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [124] = PINGROUP(124, i2s1_data1, audio_ext_mclk1, audio_ref_clk, NA, + NA, NA, NA, NA, NA, 0, -1), + [125] = PINGROUP(125, audio_ext_mclk0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [126] = PINGROUP(126, i2s0_sck, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [127] = PINGROUP(127, i2s0_data0, cmu_rng_entropy2, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [128] = PINGROUP(128, i2s0_data1, cmu_rng_entropy1, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [129] = PINGROUP(129, i2s0_ws, cmu_rng_entropy0, NA, NA, NA, NA, NA, + NA, NA, 0, -1), + [130] = PINGROUP(130, uim0_data, atest_usb0_testdataout01, + atest_char_status3, NA, NA, NA, NA, NA, NA, 0, -1), + [131] = PINGROUP(131, uim0_clk, atest_usb0_testdataout00, + atest_char_status2, NA, NA, NA, NA, NA, NA, 0, -1), + [132] = PINGROUP(132, uim0_reset, atest_char_status1, NA, NA, NA, NA, + NA, NA, NA, 0, -1), + [133] = PINGROUP(133, mdp_vsync_s, atest_char_status0, NA, NA, NA, NA, + NA, NA, NA, 0, -1), + [134] = PINGROUP(134, uim1_data, do_not_expose, qspi0, sdc40, + gcc_gp1_clk, NA, NA, NA, NA, 0, -1), + [135] = PINGROUP(135, uim1_clk, do_not_expose, qspi_clk, sdc4_clk, + gcc_gp2_clk, NA, NA, NA, NA, 0, -1), + [136] = PINGROUP(136, uim1_reset, do_not_expose, qspi1, sdc41, + gcc_gp3_clk, NA, NA, NA, NA, 0, -1), + [137] = PINGROUP(137, mdp_vsync_p, atest_char_start, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [137] = PINGROUP(137, mdp_vsync, atest_char, NA, NA, NA, NA, NA, NA, - NA, 0xD2010, 13), [138] = PINGROUP(138, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [139] = PINGROUP(139, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [140] = PINGROUP(140, NA, NA, qdss_gpio0, NA, NA, NA, NA, NA, NA, 0, -1), - [141] = PINGROUP(141, NA, NA, qdss_gpio1, NA, NA, NA, NA, NA, NA, 0, -1), - [142] = PINGROUP(142, NA, NA, qdss_gpio2, NA, NA, NA, NA, NA, NA, 0, -1), - [143] = PINGROUP(143, NA, NA, qdss_gpio3, NA, NA, NA, NA, NA, NA, 0, -1), - [144] = PINGROUP(144, NA, qdss_gpio4, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [145] = PINGROUP(145, NA, qdss_gpio5, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [146] = PINGROUP(146, NA, qdss_gpio6, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [147] = PINGROUP(147, NA, qdss_gpio7, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [148] = PINGROUP(148, coex_uart1, qdss_gpio, NA, NA, NA, NA, NA, NA, - NA, 0xD2018, 8), - [149] = PINGROUP(149, coex_uart1, qdss_gpio, NA, NA, NA, NA, NA, NA, + [140] = PINGROUP(140, NA, NA, qdss_gpio_tracedata0, NA, NA, NA, NA, NA, NA, 0, -1), - [150] = PINGROUP(150, NA, vfr_0, coex_uart2, qdss_gpio8, NA, NA, NA, - NA, NA, 0xD2018, 9), - [151] = PINGROUP(151, NA, coex_uart2, qdss_gpio9, NA, NA, NA, NA, NA, + [141] = PINGROUP(141, NA, NA, qdss_gpio_tracedata1, NA, NA, NA, NA, NA, NA, 0, -1), - [152] = PINGROUP(152, nav_gpio2, NA, qdss_gpio10, NA, NA, NA, NA, NA, + [142] = PINGROUP(142, NA, NA, qdss_gpio_tracedata2, NA, NA, NA, NA, NA, NA, 0, -1), - [153] = PINGROUP(153, cci_i2c, phase_flag29, NA, qdss_gpio5, NA, NA, - NA, NA, NA, 0xD2018, 10), - [154] = PINGROUP(154, nav_gpio0, nav_gpio3, qdss_gpio11, NA, NA, NA, - NA, NA, NA, 0xD2018, 11), - [155] = PINGROUP(155, nav_gpio1, vfr_1, qdss_gpio12, NA, NA, NA, NA, - NA, NA, 0xD2018, 12), - [156] = PINGROUP(156, qlink_little, qdss_gpio13, NA, NA, NA, NA, NA, - NA, NA, 0xD2018, 13), - [157] = PINGROUP(157, qlink_little, qdss_gpio14, NA, NA, NA, NA, NA, - NA, NA, 0, -1), - [158] = PINGROUP(158, qlink_wmss, qdss_gpio15, NA, NA, NA, NA, NA, NA, + [143] = PINGROUP(143, NA, NA, qdss_gpio_tracedata3, NA, NA, NA, NA, NA, NA, 0, -1), - [159] = PINGROUP(159, qlink_big, qdss_cti, NA, NA, NA, NA, NA, NA, NA, 0xD2018, 14), - [160] = PINGROUP(160, qlink_big, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [144] = PINGROUP(144, NA, qdss_gpio_tracedata4, NA, NA, NA, NA, NA, NA, + NA, 0, -1), + [145] = PINGROUP(145, NA, qdss_gpio_tracedata5, NA, NA, NA, NA, NA, NA, + NA, 0, -1), + [146] = PINGROUP(146, NA, qdss_gpio_tracedata6, NA, NA, NA, NA, NA, NA, + NA, 0, -1), + [147] = PINGROUP(147, NA, qdss_gpio_tracedata7, NA, NA, NA, NA, NA, NA, + NA, 0, -1), + [148] = PINGROUP(148, coex_uart1_rx, qdss_gpio_tracectl, NA, NA, NA, + NA, NA, NA, NA, 0, -1), + [149] = PINGROUP(149, coex_uart1_tx, qdss_gpio_traceclk, NA, NA, NA, + NA, NA, NA, NA, 0, -1), + [150] = PINGROUP(150, NA, vfr_0, coex_uart2_rx, qdss_gpio_tracedata8, + NA, NA, NA, NA, NA, 0, -1), + [151] = PINGROUP(151, NA, coex_uart2_tx, qdss_gpio_tracedata9, NA, NA, + NA, NA, NA, NA, 0, -1), + [152] = PINGROUP(152, nav_gpio2, NA, qdss_gpio_tracedata10, NA, NA, NA, + NA, NA, NA, 0, -1), + [153] = PINGROUP(153, cci_i2c_scl4, phase_flag_status29, NA, + qdss_gpio_tracedata5, NA, NA, NA, NA, NA, 0, -1), + [154] = PINGROUP(154, nav_gpio0, nav_gpio3, qdss_gpio_tracedata11, NA, + NA, NA, NA, NA, NA, 0, -1), + [155] = PINGROUP(155, nav_gpio1, vfr_1, qdss_gpio_tracedata12, NA, NA, + NA, NA, NA, NA, 0, -1), + [156] = PINGROUP(156, qlink_little_request, qdss_gpio_tracedata13, NA, + NA, NA, NA, NA, NA, NA, 0, -1), + [157] = PINGROUP(157, qlink_little_enable, qdss_gpio_tracedata14, NA, + NA, NA, NA, NA, NA, NA, 0, -1), + [158] = PINGROUP(158, qlink_wmss_reset, qdss_gpio_tracedata15, NA, NA, + NA, NA, NA, NA, NA, 0, -1), + [159] = PINGROUP(159, qlink_big_request, qdss_cti_trig1, NA, NA, NA, + NA, NA, NA, NA, 0, -1), + [160] = PINGROUP(160, qlink_big_enable, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [161] = PINGROUP(161, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [162] = PINGROUP(162, qdss_cti, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2018, 15), - [163] = PINGROUP(163, cci_async, phase_flag30, NA, NA, NA, NA, NA, NA, - NA, 0, -1), - [164] = PINGROUP(164, cci_async, phase_flag31, NA, NA, NA, NA, NA, NA, - NA, 0, -1), + [162] = PINGROUP(162, qdss_cti_trig0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [163] = PINGROUP(163, cci_async_in1, phase_flag_status30, NA, NA, NA, + NA, NA, NA, NA, 0, -1), + [164] = PINGROUP(164, cci_async_in2, phase_flag_status31, NA, NA, NA, + NA, NA, NA, NA, 0, -1), [165] = PINGROUP(165, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [166] = PINGROUP(166, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 2), + [166] = PINGROUP(166, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [167] = PINGROUP(167, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [168] = PINGROUP(168, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [169] = PINGROUP(169, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 3), + [169] = PINGROUP(169, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [170] = PINGROUP(170, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [171] = PINGROUP(171, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 4), - [172] = PINGROUP(172, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 5), + [171] = PINGROUP(171, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [172] = PINGROUP(172, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [173] = PINGROUP(173, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [174] = PINGROUP(174, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 6), + [174] = PINGROUP(174, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [175] = PINGROUP(175, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [176] = PINGROUP(176, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 7), - [177] = PINGROUP(177, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 8), + [176] = PINGROUP(176, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [177] = PINGROUP(177, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [178] = PINGROUP(178, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [179] = PINGROUP(179, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [180] = PINGROUP(180, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [181] = PINGROUP(181, prng_rosc3, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 9), - [182] = PINGROUP(182, prng_rosc2, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 10), - [183] = PINGROUP(183, prng_rosc1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [181] = PINGROUP(181, prng_rosc_test3, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [182] = PINGROUP(182, prng_rosc_test2, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [183] = PINGROUP(183, prng_rosc_test1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [184] = PINGROUP(184, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [185] = PINGROUP(185, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 11), - [186] = PINGROUP(186, prng_rosc0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [187] = PINGROUP(187, cri_trng, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 12), - [188] = PINGROUP(188, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 13), + [185] = PINGROUP(185, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [186] = PINGROUP(186, prng_rosc_test0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [187] = PINGROUP(187, cri_trng_rosc, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [188] = PINGROUP(188, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [189] = PINGROUP(189, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [190] = PINGROUP(190, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 14), + [190] = PINGROUP(190, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [191] = PINGROUP(191, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [192] = PINGROUP(192, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2004, 15), + [192] = PINGROUP(192, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [193] = PINGROUP(193, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [194] = PINGROUP(194, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [195] = PINGROUP(195, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2008, 0), + [195] = PINGROUP(195, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [196] = PINGROUP(196, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [197] = PINGROUP(197, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [198] = PINGROUP(198, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [199] = PINGROUP(199, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [200] = PINGROUP(200, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [201] = PINGROUP(201, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2008, 1), + [201] = PINGROUP(201, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [202] = PINGROUP(202, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [203] = PINGROUP(203, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2008, 2), + [203] = PINGROUP(203, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [204] = PINGROUP(204, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [205] = PINGROUP(205, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0xD2008, 3), - [206] = PINGROUP(206, i2chub0_se8, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [207] = PINGROUP(207, i2chub0_se8, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [205] = PINGROUP(205, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [206] = PINGROUP(206, i2chub0_se8_l0, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), + [207] = PINGROUP(207, i2chub0_se8_l1, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [208] = PINGROUP(208, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), [209] = PINGROUP(209, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1), - [210] = UFS_RESET(ufs_reset, 0x1de000), + [210] = UFS_RESET(ufs_reset, 0x1de004), [211] = SDC_QDSD_PINGROUP(sdc2_clk, 0x1d6000, 14, 6), [212] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x1d6000, 11, 3), [213] = SDC_QDSD_PINGROUP(sdc2_data, 0x1d6000, 9, 0), }; + +/* + * The first arguments to QUP_I3C below have been chosen to be monotonically + * increasing integers so as to be able to cater to two QUP blocks. + */ static struct pinctrl_qup pineapple_qup_regs[] = { - QUP_I3C(8, QUP_I3C_8_MODE_OFFSET), - QUP_I3C(9, QUP_I3C_9_MODE_OFFSET), - QUP_I3C(16, QUP_I3C_16_MODE_OFFSET), - QUP_I3C(15, QUP_I3C_15_MODE_OFFSET), + QUP_I3C(1, QUP_1_I3C_0_MODE_OFFSET), + QUP_I3C(2, QUP_1_I3C_1_MODE_OFFSET), + QUP_I3C(3, QUP_1_I3C_4_MODE_OFFSET), + QUP_I3C(4, QUP_1_I3C_6_MODE_OFFSET), + QUP_I3C(5, QUP_2_I3C_0_MODE_OFFSET), + QUP_I3C(6, QUP_2_I3C_1_MODE_OFFSET), + QUP_I3C(7, QUP_2_I3C_2_MODE_OFFSET), + QUP_I3C(8, QUP_2_I3C_3_MODE_OFFSET), }; static const struct msm_pinctrl_soc_data pineapple_pinctrl = {