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clk: qcom: dispcc-sm6350: Add MDSS_CORE & MDSS_RSCC resets

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Add the offsets for two resets inside the dispcc on SM6350 SoC.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250919-sm6350-mdss-reset-v1-2-48dcac917c73@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Luca Weiss 2025-09-19 11:57:24 +02:00 committed by Bjorn Andersson
parent ff71d2d85d
commit 502099e9c8
1 changed files with 7 additions and 0 deletions
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7
drivers/clk/qcom/dispcc-sm6350.c
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@ -679,6 +679,11 @@ static struct clk_branch disp_cc_xo_clk = {
},
};
static const struct qcom_reset_map disp_cc_sm6350_resets[] = {
[DISP_CC_MDSS_CORE_BCR] = { 0x1000 },
[DISP_CC_MDSS_RSCC_BCR] = { 0x2000 },
};
static struct gdsc mdss_gdsc = {
.gdscr = 0x1004,
.en_rest_wait_val = 0x2,
@ -746,6 +751,8 @@ static const struct qcom_cc_desc disp_cc_sm6350_desc = {
.num_clks = ARRAY_SIZE(disp_cc_sm6350_clocks),
.gdscs = disp_cc_sm6350_gdscs,
.num_gdscs = ARRAY_SIZE(disp_cc_sm6350_gdscs),
.resets = disp_cc_sm6350_resets,
.num_resets = ARRAY_SIZE(disp_cc_sm6350_resets),
};
static const struct of_device_id disp_cc_sm6350_match_table[] = {