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arm64: dts: socfpga: agilex5: Add dma-coherent to XGMAC nodes

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The SMMU is enabled and transactions going through it are cache
coherent. Add the dma-coherent property to the XGMAC nodes to prevent
redundant cache flush/invalidate operations and potential stale data
issues.

Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This commit is contained in:
Nazim Amirul 2026-06-23 23:22:03 -07:00 committed by Dinh Nguyen
parent 10cf797f3f
commit 501a98280c
1 changed files with 3 additions and 0 deletions
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3
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
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@ -608,6 +608,7 @@ gmac0: ethernet@10810000 {
altr,sysmgr-syscon = <&sysmgr 0x44 0>;
snps,clk-csr = <0>;
iommus = <&smmu 1>;
dma-coherent;
status = "disabled";
stmmac_axi_emac0_setup: stmmac-axi-config {
@ -721,6 +722,7 @@ gmac1: ethernet@10820000 {
altr,sysmgr-syscon = <&sysmgr 0x48 0>;
snps,clk-csr = <0>;
iommus = <&smmu 2>;
dma-coherent;
status = "disabled";
stmmac_axi_emac1_setup: stmmac-axi-config {
@ -834,6 +836,7 @@ gmac2: ethernet@10830000 {
altr,sysmgr-syscon = <&sysmgr 0x4c 0>;
snps,clk-csr = <0>;
iommus = <&smmu 3>;
dma-coherent;
status = "disabled";
stmmac_axi_emac2_setup: stmmac-axi-config {