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ARM: dts: stm32: stm32mp15x-mecio1-io: Move gpio-line-names to board files

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Move the gpio-line-names properties out of the common mecio1-io.dtsi file
and into the specific board dts files.

The pinout originally defined in the common include file belonged to the
mecio1r0 (Revision 0) hardware. This is moved 1:1 into the
stm32mp151c-mecio1r0.dts file without any modifications.

A large number of GPIO pins are swapped on the mecio1r1 (Revision 1)
hardware, so a new, board-specific gpio-line-names mapping is added to
stm32mp153c-mecio1r1.dts to reflect those hardware changes.

Fixes: 8267753c89 ("ARM: dts: stm32: Add MECIO1 and MECT1S board variants")
Co-developed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20260318105123.819807-6-o.rempel@pengutronix.de
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This commit is contained in:
David Jander 2026-03-18 11:51:21 +01:00 committed by Alexandre Torgue
parent b04ccecb71
commit 4f5069609a
3 changed files with 144 additions and 63 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

64
arch/arm/boot/dts/st/stm32mp151c-mecio1r0.dts
View File

@ -96,3 +96,67 @@ &ethernet0 {
assigned-clock-rates = <125000000>; /* Clock PLL3 to 625Mhz in tf-a. */
st,eth-clk-sel;
};
&gpiod {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "", "", "",
"STP_RESETN", "STP_ENABLEN", "HPOUT0", "HPOUT0_ALERTN";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog_d_mecsbc>;
};
&gpioe {
gpio-line-names = "HPOUT0_RESETN", "HPOUT1", "HPOUT1_ALERTN", "",
"", "", "HPOUT1_RESETN",
"LPOUT0", "LPOUT0_ALERTN", "LPOUT0_RESETN",
"LPOUT1", "LPOUT1_ALERTN", "LPOUT1_RESETN",
"LPOUT2", "LPOUT2_ALERTN", "LPOUT2_RESETN";
};
&gpiof {
gpio-line-names = "LPOUT3", "LPOUT3_ALERTN", "LPOUT3_RESETN",
"LPOUT4", "LPOUT4_ALERTN", "LPOUT4_RESETN",
"", "",
"", "", "", "",
"", "", "", "";
};
&gpiog {
gpio-line-names = "LPOUT5", "LPOUT5_ALERTN", "", "LPOUT5_RESETN",
"", "", "", "",
"", "", "", "",
"", "", "", "";
};
&gpioh {
gpio-line-names = "", "", "", "",
"", "", "", "",
"GPIO0_RESETN", "", "", "",
"", "", "", "";
};
&gpioi {
gpio-line-names = "", "", "", "",
"", "", "", "",
"HPDCM0_SLEEPN", "HPDCM1_SLEEPN", "GPIO1_RESETN", "",
"", "", "", "";
};
&gpioj {
gpio-line-names = "HSIN10", "HSIN11", "HSIN12", "HSIN13",
"HSIN14", "HSIN15", "", "",
"", "", "", "",
"", "RTD_RESETN", "", "";
};
&gpiok {
gpio-line-names = "", "", "HSIN0", "HSIN1",
"HSIN2", "HSIN3", "HSIN4", "HSIN5";
};
&gpioz {
gpio-line-names = "", "", "", "HSIN6",
"HSIN7", "HSIN8", "HSIN9", "";
};

80
arch/arm/boot/dts/st/stm32mp153c-mecio1r1.dts
View File

@ -90,6 +90,86 @@ &clk_hse {
clock-frequency = <24000000>;
};
&gpioa {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "", "GPIO1_RESETN", "",
"", "", "", "LPOUT5";
};
&gpiob {
gpio-line-names = "", "", "", "",
"LPOUT4_RESETN", "", "", "",
"", "LPOUT4_ALERTN", "", "",
"", "", "", "";
};
&gpioc {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "LPOUT4", "", "",
"", "", "", "";
};
&gpiod {
gpio-line-names = "LPOUT2", "", "LPOUT3_RESETN", "",
"LPOUT2_ALERTN", "", "MECIO_ADDR0", "",
"HPOUT1_ALERTN", "HPOUT1_RESETN", "", "",
"", "", "HPOUT0", "HPOUT1";
};
&gpioe {
gpio-line-names = "LPOUT0_RESETN", "", "", "",
"", "LPOUT3", "LPOUT5_ALERTN", "",
"", "", "", "",
"", "", "", "HSIN_RESETN";
};
&gpiof {
gpio-line-names = "LPOUT5_RESETN", "", "", "HPOUT0_ALERTN",
"", "LPOUT1", "", "",
"", "", "", "",
"", "", "", "";
};
&gpiog {
gpio-line-names = "", "", "", "HPOUT0_RESETN",
"", "", "LPOUT3_ALERTN", "",
"", "", "GPIO0_RESETN", "",
"", "", "", "LPOUT2_RESETN";
};
&gpioh {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "LPOUT0", "", "",
"", "LPOUT0_ALERTN", "STP_ENABLEN", "STP_RESETN";
};
&gpioi {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "", "SPE_RESETN", "",
"HPDCM0_SLEEPN", "", "", "";
};
&gpioj {
gpio-line-names = "", "", "", "",
"", "", "", "MECIO_ADDR1",
"", "", "", "",
"", "", "", "LPOUT1_RESETN";
};
&gpiok {
gpio-line-names = "", "", "RTD_RESETN", "",
"", "LPOUT1_ALERTN", "", "";
};
&gpioz {
gpio-line-names = "", "", "", "",
"HPDCM1_SLEEPN", "", "", "";
};
&m_can1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&m_can1_pins_b>;

63
arch/arm/boot/dts/st/stm32mp15x-mecio1-io.dtsi
View File

@ -173,69 +173,6 @@ phy0: ethernet-phy@8 {
};
};
&gpiod {
gpio-line-names = "", "", "", "",
"", "", "", "",
"", "", "", "",
"STP_RESETN", "STP_ENABLEN", "HPOUT0", "HPOUT0_ALERTN";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog_d_mecsbc>;
};
&gpioe {
gpio-line-names = "HPOUT0_RESETN", "HPOUT1", "HPOUT1_ALERTN", "",
"", "", "HPOUT1_RESETN",
"LPOUT0", "LPOUT0_ALERTN", "LPOUT0_RESETN",
"LPOUT1", "LPOUT1_ALERTN", "LPOUT1_RESETN",
"LPOUT2", "LPOUT2_ALERTN", "LPOUT2_RESETN";
};
&gpiof {
gpio-line-names = "LPOUT3", "LPOUT3_ALERTN", "LPOUT3_RESETN",
"LPOUT4", "LPOUT4_ALERTN", "LPOUT4_RESETN",
"", "",
"", "", "", "",
"", "", "", "";
};
&gpiog {
gpio-line-names = "LPOUT5", "LPOUT5_ALERTN", "", "LPOUT5_RESETN",
"", "", "", "",
"", "", "", "",
"", "", "", "";
};
&gpioh {
gpio-line-names = "", "", "", "",
"", "", "", "",
"GPIO0_RESETN", "", "", "",
"", "", "", "";
};
&gpioi {
gpio-line-names = "", "", "", "",
"", "", "", "",
"HPDCM0_SLEEPN", "HPDCM1_SLEEPN", "GPIO1_RESETN", "",
"", "", "", "";
};
&gpioj {
gpio-line-names = "HSIN10", "HSIN11", "HSIN12", "HSIN13",
"HSIN14", "HSIN15", "", "",
"", "", "", "",
"", "RTD_RESETN", "", "";
};
&gpiok {
gpio-line-names = "", "", "HSIN0", "HSIN1",
"HSIN2", "HSIN3", "HSIN4", "HSIN5";
};
&gpioz {
gpio-line-names = "", "", "", "HSIN6",
"HSIN7", "HSIN8", "HSIN9", "";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;