From 4e9088abeacb9fca16c3774bd3d57a696924a0f2 Mon Sep 17 00:00:00 2001 From: Stefano Radaelli Date: Thu, 19 Mar 2026 19:40:27 +0100 Subject: [PATCH] arm64: dts: imx8mm-var-som-symphony: Move USB configuration from SOM Move the USB controller configuration out of the i.MX8MM VAR-SOM dtsi and into the VAR-SOM Symphony carrier board dts. The SOM does not provide any USB connectors and carrier boards may choose whether and how to route USB, therefore USB should be described in the carrier-specific device tree instead of the SOM include. While moving the nodes, align the Symphony USB description with the carrier design by enabling both USB controllers, wiring USB1 to the PTN5150 Type-C controller for dual-role operation, and updating the PHY tuning and VBUS regulator pinctrl (including a sleep state). Signed-off-by: Stefano Radaelli Signed-off-by: Frank Li --- .../dts/freescale/imx8mm-var-som-symphony.dts | 48 ++++++++++++------- .../boot/dts/freescale/imx8mm-var-som.dtsi | 12 ----- 2 files changed, 32 insertions(+), 28 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts index 2b608470da8e..a425ee0ed8a9 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts @@ -32,6 +32,7 @@ reg_usb_otg2_vbus: regulator-usb-otg2-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reg_usb_otg2_vbus>; + pinctrl-1 = <&pinctrl_reg_usb_otg2_vbus_sleep>; regulator-name = "usb_otg2_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; @@ -133,13 +134,20 @@ enet-sel-hog { }; }; - extcon_usbotg1: typec@3d { + /* USB Type-C Controller */ + ptn5150: typec@3d { compatible = "nxp,ptn5150"; reg = <0x3d>; interrupt-parent = <&gpio1>; interrupts = <11 IRQ_TYPE_LEVEL_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ptn5150>; + + port { + typec1_dr_sw: endpoint { + remote-endpoint = <&usb1_drd_sw>; + }; + }; }; }; @@ -187,27 +195,29 @@ &uart4 { }; &usbotg1 { - disable-over-current; - extcon = <&extcon_usbotg1>, <&extcon_usbotg1>; + dr_mode = "otg"; + hnp-disable; + srp-disable; + adp-disable; + usb-role-switch; + samsung,picophy-pre-emp-curr-control = <3>; + samsung,picophy-dc-vol-level-adjust = <7>; + status = "okay"; + + port { + usb1_drd_sw: endpoint { + remote-endpoint = <&typec1_dr_sw>; + }; + }; }; &usbotg2 { dr_mode = "host"; vbus-supply = <®_usb_otg2_vbus>; - srp-disable; - hnp-disable; - adp-disable; + samsung,picophy-pre-emp-curr-control = <3>; + samsung,picophy-dc-vol-level-adjust = <7>; disable-over-current; - /delete-property/ usb-role-switch; - /* - * FIXME: having USB2 enabled hangs the boot just after: - * [ 1.943365] ci_hdrc ci_hdrc.1: EHCI Host Controller - * [ 1.948287] ci_hdrc ci_hdrc.1: new USB bus registered, assigned bus number 1 - * [ 1.971006] ci_hdrc ci_hdrc.1: USB 2.0 started, EHCI 1.00 - * [ 1.977203] hub 1-0:1.0: USB hub found - * [ 1.980987] hub 1-0:1.0: 1 port detected - */ - status = "disabled"; + status = "okay"; }; &pinctrl_fec1 { @@ -262,6 +272,12 @@ MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1 0x16 >; }; + pinctrl_reg_usb_otg2_vbus_sleep: regusbotg2vbus-sleepgrp { + fsl,pins = < + MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1 0x120 + >; + }; + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { fsl,pins = < MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi index 4c863fe2284a..d05b1ab17fed 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi @@ -378,18 +378,6 @@ &uart2 { status = "okay"; }; -&usbotg1 { - dr_mode = "otg"; - usb-role-switch; - status = "okay"; -}; - -&usbotg2 { - dr_mode = "otg"; - usb-role-switch; - status = "okay"; -}; - &usdhc1 { #address-cells = <1>; #size-cells = <0>;