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arm64: dts: allwinner: h5/h6: Drop spurious 'clock-latency-ns' properties

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'clock-latency-ns' is not a valid property for CPU nodes. It belongs in
OPP table (which has it). Drop them from the CPU nodes.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20250410-dt-cpu-schema-v2-1-63d7dc9ddd0a@kernel.org
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Rob Herring (Arm) 2025-04-10 10:47:22 -05:00 committed by Chen-Yu Tsai
parent 71776a6eb3
commit 4e743ca6ee
2 changed files with 0 additions and 8 deletions
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4
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
View File

@ -16,7 +16,6 @@ cpu0: cpu@0 {
reg = <0>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
};
@ -26,7 +25,6 @@ cpu1: cpu@1 {
reg = <1>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
};
@ -36,7 +34,6 @@ cpu2: cpu@2 {
reg = <2>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
};
@ -46,7 +43,6 @@ cpu3: cpu@3 {
reg = <3>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
};
};

4
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
View File

@ -27,7 +27,6 @@ cpu0: cpu@0 {
reg = <0>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
i-cache-size = <0x8000>;
i-cache-line-size = <64>;
@ -44,7 +43,6 @@ cpu1: cpu@1 {
reg = <1>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
i-cache-size = <0x8000>;
i-cache-line-size = <64>;
@ -61,7 +59,6 @@ cpu2: cpu@2 {
reg = <2>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
i-cache-size = <0x8000>;
i-cache-line-size = <64>;
@ -78,7 +75,6 @@ cpu3: cpu@3 {
reg = <3>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
i-cache-size = <0x8000>;
i-cache-line-size = <64>;