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[GIT PULL for v7.1-rc3] media fixes

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-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE+QmuaPwR3wnBdVwACF8+vY7k4RUFAmn50ZoACgkQCF8+vY7k
 4RV+Ow/+LRg8E4avWon9LhMPIGE9YjnqPkjGdtukPFeUL4Uygff+jaGQ+tljB6k0
 u16MN86igKqnTeiQVVGk2QcSMywBiZHjYcqMc6OI3uuqnszwCIsOYSGdwFHWOfSz
 c/PmNGLKrS3QLOCIxwvDjf2U+Yo0jS2tzEWg+CiYjFJI6K2rcNybW1AHNCY8QGjY
 1068F9pfcvGG0xh1If6y/M3SXOhqc8Oyu+G+ZrsPhUmgrjSSLrynkVHBoATH21QQ
 rR7VATBc8dTzrs2ta4ajKGugNt5dBQbNmVyuX9UVO7TrwAsbrkU0AeEtb7NYTUbP
 /gWrsogxN/w1qinILJM4MNS7Dvsy/ByFgUd4RPqJ6wsyZPYvvR0I69V0XFxshmic
 NGqDi6hYS9enj3QbEKfQLG1qk1KZIstauTVLcOMxSH0TmWGmL15ADeY+qIUpwp1S
 QFa3iDHqgWCtC03ZftHKSL/nnC+xUDFkVPMccZ11ldBork3qPTpmz3Q2kEm/uz4E
 S25U9o0Qc5dTGewdcpW43zw2eQ5R3PxS/mhqEAHuChAkYsnzHfYgSmR6nEBDyNmV
 YZ80uj6kJY6MrmXo94uSd5XOMg3ikU5u7DL6byVViSguFpCoK/c9oKV5ne4Vd2dQ
 1Byy+eobhBRpXJrs9pGXHK3ZoHt2g7PlikgVjC/4XkGbvv1k6bY=
 =fCwG
 -----END PGP SIGNATURE-----

Merge tag 'media/v7.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media

Pull media fixes from Mauro Carvalho Chehab:

 - rc: ttusbir: fix inverted error logic

 - Venus/Iris fixes:
      - Kconfig cross compile build testing for x86
      - Use-after-free fix for internal buffers
      - dma_free_attrs size fix
      - Switch to hardware mode clocks
      - Use-after-free fix for a concurrency path
      - Fix H265D_MAX_SLICE size for sc7280 devices

 - camoss: fix some clock-related issues

* tag 'media/v7.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media:
  media: qcom: camss: avoid format string warning
  media: qcom: camss: Add missing clocks for VFE lite on sa8775p
  media: qcom: camss: Fix csid clock configuration for sa8775p
  media: qcom: camss: Fix csid IRQ offset for sa8775p
  media: qcom: iris: increase H265D_MAX_SLICE to fix H.265 decoding on SC7280
  media: iris: fix use-after-free of fmt_src during MBPF check
  media: iris: switch to hardware mode after firmware boot
  media: iris: Fix dma_free_attrs() size in iris_hfi_queues_init()
  media: iris: Fix use-after-free in iris_release_internal_buffers()
  media: iris: fix QCOM_MDT_LOADER dependency
  media: venus: fix QCOM_MDT_LOADER dependency
This commit is contained in:
Linus Torvalds 2026-05-05 08:45:41 -07:00
commit 4e38654713
20 changed files with 99 additions and 94 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/media/platform/qcom/camss/camss-csid-gen3.c
View File

@ -48,9 +48,9 @@
#define IS_CSID_690(csid) ((csid->camss->res->version == CAMSS_8775P) \
|| (csid->camss->res->version == CAMSS_8300))
#define CSID_BUF_DONE_IRQ_STATUS 0x8C
#define BUF_DONE_IRQ_STATUS_RDI_OFFSET (csid_is_lite(csid) ?\
1 : (IS_CSID_690(csid) ?\
13 : 14))
#define BUF_DONE_IRQ_STATUS_RDI_OFFSET (csid_is_lite(csid) ? \
((IS_CSID_690(csid) ? 0 : 1)) : \
((IS_CSID_690(csid) ? 13 : 14)))
#define CSID_BUF_DONE_IRQ_MASK 0x90
#define CSID_BUF_DONE_IRQ_CLEAR 0x94
#define CSID_BUF_DONE_IRQ_SET 0x98

10
drivers/media/platform/qcom/camss/camss-csiphy.c
View File

@ -558,12 +558,16 @@ static int csiphy_init_formats(struct v4l2_subdev *sd,
return csiphy_set_format(sd, fh ? fh->state : NULL, &format);
}
static bool csiphy_match_clock_name(const char *clock_name, const char *format,
int index)
static bool __printf(2, 3)
csiphy_match_clock_name(const char *clock_name, const char *format, ...)
{
char name[16]; /* csiphyXXX_timer\0 */
va_list args;
va_start(args, format);
vsnprintf(name, sizeof(name), format, args);
va_end(args);
snprintf(name, sizeof(name), format, index);
return !strcmp(clock_name, name);
}

80
drivers/media/platform/qcom/camss/camss.c
View File

@ -3598,12 +3598,10 @@ static const struct camss_subdev_resources csid_res_8775p[] = {
/* CSID2 (lite) */
{
.regulators = {},
.clock = { "cpas_vfe_lite", "vfe_lite_ahb",
"vfe_lite_csid", "vfe_lite_cphy_rx",
"vfe_lite"},
.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx" },
.clock_rate = {
{ 0, 0, 400000000, 400000000, 0},
{ 0, 0, 400000000, 480000000, 0}
{ 400000000, 480000000 },
{ 400000000, 480000000 }
},
.reg = { "csid_lite0" },
.interrupt = { "csid_lite0" },
@ -3617,12 +3615,10 @@ static const struct camss_subdev_resources csid_res_8775p[] = {
/* CSID3 (lite) */
{
.regulators = {},
.clock = { "cpas_vfe_lite", "vfe_lite_ahb",
"vfe_lite_csid", "vfe_lite_cphy_rx",
"vfe_lite"},
.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx" },
.clock_rate = {
{ 0, 0, 400000000, 400000000, 0},
{ 0, 0, 400000000, 480000000, 0}
{ 400000000, 480000000 },
{ 400000000, 480000000 }
},
.reg = { "csid_lite1" },
.interrupt = { "csid_lite1" },
@ -3636,12 +3632,10 @@ static const struct camss_subdev_resources csid_res_8775p[] = {
/* CSID4 (lite) */
{
.regulators = {},
.clock = { "cpas_vfe_lite", "vfe_lite_ahb",
"vfe_lite_csid", "vfe_lite_cphy_rx",
"vfe_lite"},
.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx" },
.clock_rate = {
{ 0, 0, 400000000, 400000000, 0},
{ 0, 0, 400000000, 480000000, 0}
{ 400000000, 480000000 },
{ 400000000, 480000000 }
},
.reg = { "csid_lite2" },
.interrupt = { "csid_lite2" },
@ -3655,12 +3649,10 @@ static const struct camss_subdev_resources csid_res_8775p[] = {
/* CSID5 (lite) */
{
.regulators = {},
.clock = { "cpas_vfe_lite", "vfe_lite_ahb",
"vfe_lite_csid", "vfe_lite_cphy_rx",
"vfe_lite"},
.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx" },
.clock_rate = {
{ 0, 0, 400000000, 400000000, 0},
{ 0, 0, 400000000, 480000000, 0}
{ 400000000, 480000000 },
{ 400000000, 480000000 }
},
.reg = { "csid_lite3" },
.interrupt = { "csid_lite3" },
@ -3674,12 +3666,10 @@ static const struct camss_subdev_resources csid_res_8775p[] = {
/* CSID6 (lite) */
{
.regulators = {},
.clock = { "cpas_vfe_lite", "vfe_lite_ahb",
"vfe_lite_csid", "vfe_lite_cphy_rx",
"vfe_lite"},
.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx" },
.clock_rate = {
{ 0, 0, 400000000, 400000000, 0},
{ 0, 0, 400000000, 480000000, 0}
{ 400000000, 480000000 },
{ 400000000, 480000000 }
},
.reg = { "csid_lite4" },
.interrupt = { "csid_lite4" },
@ -3752,15 +3742,17 @@ static const struct camss_subdev_resources vfe_res_8775p[] = {
/* VFE2 (lite) */
{
.regulators = {},
.clock = { "cpas_vfe_lite", "vfe_lite_ahb",
.clock = { "cpas_ahb", "cpas_vfe_lite", "vfe_lite_ahb",
"vfe_lite_csid", "vfe_lite_cphy_rx",
"vfe_lite"},
"vfe_lite", "camnoc_axi"},
.clock_rate = {
{ 0, 0, 0, 0 },
{ 0 },
{ 0 },
{ 300000000, 400000000, 400000000, 400000000 },
{ 400000000, 400000000, 400000000, 400000000 },
{ 400000000, 400000000, 400000000, 400000000 },
{ 480000000, 600000000, 600000000, 600000000 },
{ 400000000 },
},
.reg = { "vfe_lite0" },
.interrupt = { "vfe_lite0" },
@ -3775,15 +3767,17 @@ static const struct camss_subdev_resources vfe_res_8775p[] = {
/* VFE3 (lite) */
{
.regulators = {},
.clock = { "cpas_vfe_lite", "vfe_lite_ahb",
.clock = { "cpas_ahb", "cpas_vfe_lite", "vfe_lite_ahb",
"vfe_lite_csid", "vfe_lite_cphy_rx",
"vfe_lite"},
"vfe_lite", "camnoc_axi"},
.clock_rate = {
{ 0, 0, 0, 0 },
{ 0 },
{ 0 },
{ 300000000, 400000000, 400000000, 400000000 },
{ 400000000, 400000000, 400000000, 400000000 },
{ 400000000, 400000000, 400000000, 400000000 },
{ 480000000, 600000000, 600000000, 600000000 },
{ 400000000 },
},
.reg = { "vfe_lite1" },
.interrupt = { "vfe_lite1" },
@ -3798,15 +3792,17 @@ static const struct camss_subdev_resources vfe_res_8775p[] = {
/* VFE4 (lite) */
{
.regulators = {},
.clock = { "cpas_vfe_lite", "vfe_lite_ahb",
.clock = { "cpas_ahb", "cpas_vfe_lite", "vfe_lite_ahb",
"vfe_lite_csid", "vfe_lite_cphy_rx",
"vfe_lite"},
"vfe_lite", "camnoc_axi"},
.clock_rate = {
{ 0, 0, 0, 0 },
{ 0 },
{ 0 },
{ 300000000, 400000000, 400000000, 400000000 },
{ 400000000, 400000000, 400000000, 400000000 },
{ 400000000, 400000000, 400000000, 400000000 },
{ 480000000, 600000000, 600000000, 600000000 },
{ 400000000 },
},
.reg = { "vfe_lite2" },
.interrupt = { "vfe_lite2" },
@ -3821,15 +3817,17 @@ static const struct camss_subdev_resources vfe_res_8775p[] = {
/* VFE5 (lite) */
{
.regulators = {},
.clock = { "cpas_vfe_lite", "vfe_lite_ahb",
.clock = { "cpas_ahb", "cpas_vfe_lite", "vfe_lite_ahb",
"vfe_lite_csid", "vfe_lite_cphy_rx",
"vfe_lite"},
"vfe_lite", "camnoc_axi"},
.clock_rate = {
{ 0, 0, 0, 0 },
{ 0 },
{ 0 },
{ 300000000, 400000000, 400000000, 400000000 },
{ 400000000, 400000000, 400000000, 400000000 },
{ 400000000, 400000000, 400000000, 400000000 },
{ 480000000, 600000000, 600000000, 600000000 },
{ 400000000 },
},
.reg = { "vfe_lite3" },
.interrupt = { "vfe_lite3" },
@ -3844,15 +3842,17 @@ static const struct camss_subdev_resources vfe_res_8775p[] = {
/* VFE6 (lite) */
{
.regulators = {},
.clock = { "cpas_vfe_lite", "vfe_lite_ahb",
.clock = { "cpas_ahb", "cpas_vfe_lite", "vfe_lite_ahb",
"vfe_lite_csid", "vfe_lite_cphy_rx",
"vfe_lite"},
"vfe_lite", "camnoc_axi"},
.clock_rate = {
{ 0, 0, 0, 0 },
{ 0 },
{ 0 },
{ 300000000, 400000000, 400000000, 400000000 },
{ 400000000, 400000000, 400000000, 400000000 },
{ 400000000, 400000000, 400000000, 400000000 },
{ 480000000, 600000000, 600000000, 600000000 },
{ 400000000 },
},
.reg = { "vfe_lite4" },
.interrupt = { "vfe_lite4" },

2
drivers/media/platform/qcom/iris/Kconfig
View File

@ -3,7 +3,7 @@ config VIDEO_QCOM_IRIS
depends on VIDEO_DEV
depends on ARCH_QCOM || COMPILE_TEST
select V4L2_MEM2MEM_DEV
select QCOM_MDT_LOADER if ARCH_QCOM
select QCOM_MDT_LOADER
select QCOM_SCM
select VIDEOBUF2_DMA_CONTIG
help

8
drivers/media/platform/qcom/iris/iris_buffer.c
View File

@ -582,10 +582,12 @@ static int iris_release_internal_buffers(struct iris_inst *inst,
continue;
if (!(buffer->attr & BUF_ATTR_QUEUED))
continue;
ret = hfi_ops->session_release_buf(inst, buffer);
if (ret)
return ret;
buffer->attr |= BUF_ATTR_PENDING_RELEASE;
ret = hfi_ops->session_release_buf(inst, buffer);
if (ret) {
buffer->attr &= ~BUF_ATTR_PENDING_RELEASE;
return ret;
}
}
return 0;

4
drivers/media/platform/qcom/iris/iris_core.c
View File

@ -75,6 +75,10 @@ int iris_core_init(struct iris_core *core)
if (ret)
goto error_unload_fw;
ret = iris_vpu_switch_to_hwmode(core);
if (ret)
goto error_unload_fw;
ret = iris_hfi_core_init(core);
if (ret)
goto error_unload_fw;

4
drivers/media/platform/qcom/iris/iris_hfi_common.c
View File

@ -159,6 +159,10 @@ int iris_hfi_pm_resume(struct iris_core *core)
if (ret)
goto err_suspend_hw;
ret = iris_vpu_switch_to_hwmode(core);
if (ret)
goto err_suspend_hw;
ret = ops->sys_interframe_powercollapse(core);
if (ret)
goto err_suspend_hw;

2
drivers/media/platform/qcom/iris/iris_hfi_queue.c
View File

@ -263,7 +263,7 @@ int iris_hfi_queues_init(struct iris_core *core)
GFP_KERNEL, DMA_ATTR_WRITE_COMBINE);
if (!core->sfr_vaddr) {
dev_err(core->dev, "sfr alloc and map failed\n");
dma_free_attrs(core->dev, sizeof(*q_tbl_hdr), core->iface_q_table_vaddr,
dma_free_attrs(core->dev, queue_size, core->iface_q_table_vaddr,
core->iface_q_table_daddr, DMA_ATTR_WRITE_COMBINE);
return -ENOMEM;
}

6
drivers/media/platform/qcom/iris/iris_vdec.c
View File

@ -61,12 +61,6 @@ int iris_vdec_inst_init(struct iris_inst *inst)
return iris_ctrls_init(inst);
}
void iris_vdec_inst_deinit(struct iris_inst *inst)
{
kfree(inst->fmt_dst);
kfree(inst->fmt_src);
}
static const struct iris_fmt iris_vdec_formats_cap[] = {
[IRIS_FMT_NV12] = {
.pixfmt = V4L2_PIX_FMT_NV12,

1
drivers/media/platform/qcom/iris/iris_vdec.h
View File

@ -9,7 +9,6 @@
struct iris_inst;
int iris_vdec_inst_init(struct iris_inst *inst);
void iris_vdec_inst_deinit(struct iris_inst *inst);
int iris_vdec_enum_fmt(struct iris_inst *inst, struct v4l2_fmtdesc *f);
int iris_vdec_try_fmt(struct iris_inst *inst, struct v4l2_format *f);
int iris_vdec_s_fmt(struct iris_inst *inst, struct v4l2_format *f);

6
drivers/media/platform/qcom/iris/iris_venc.c
View File

@ -79,12 +79,6 @@ int iris_venc_inst_init(struct iris_inst *inst)
return iris_ctrls_init(inst);
}
void iris_venc_inst_deinit(struct iris_inst *inst)
{
kfree(inst->fmt_dst);
kfree(inst->fmt_src);
}
static const struct iris_fmt iris_venc_formats_cap[] = {
[IRIS_FMT_H264] = {
.pixfmt = V4L2_PIX_FMT_H264,

1
drivers/media/platform/qcom/iris/iris_venc.h
View File

@ -9,7 +9,6 @@
struct iris_inst;
int iris_venc_inst_init(struct iris_inst *inst);
void iris_venc_inst_deinit(struct iris_inst *inst);
int iris_venc_enum_fmt(struct iris_inst *inst, struct v4l2_fmtdesc *f);
int iris_venc_try_fmt(struct iris_inst *inst, struct v4l2_format *f);
int iris_venc_s_fmt(struct iris_inst *inst, struct v4l2_format *f);

6
drivers/media/platform/qcom/iris/iris_vidc.c
View File

@ -289,10 +289,6 @@ int iris_close(struct file *filp)
v4l2_m2m_ctx_release(inst->m2m_ctx);
v4l2_m2m_release(inst->m2m_dev);
mutex_lock(&inst->lock);
if (inst->domain == DECODER)
iris_vdec_inst_deinit(inst);
else if (inst->domain == ENCODER)
iris_venc_inst_deinit(inst);
iris_session_close(inst);
iris_inst_change_state(inst, IRIS_INST_DEINIT);
iris_v4l2_fh_deinit(inst, filp);
@ -304,6 +300,8 @@ int iris_close(struct file *filp)
mutex_unlock(&inst->lock);
mutex_destroy(&inst->ctx_q_lock);
mutex_destroy(&inst->lock);
kfree(inst->fmt_src);
kfree(inst->fmt_dst);
kfree(inst);
return 0;

1
drivers/media/platform/qcom/iris/iris_vpu2.c
View File

@ -44,4 +44,5 @@ const struct vpu_ops iris_vpu2_ops = {
.power_off_controller = iris_vpu_power_off_controller,
.power_on_controller = iris_vpu_power_on_controller,
.calc_freq = iris_vpu2_calc_freq,
.set_hwmode = iris_vpu_set_hwmode,
};

9
drivers/media/platform/qcom/iris/iris_vpu3x.c
View File

@ -234,14 +234,8 @@ static int iris_vpu35_power_on_hw(struct iris_core *core)
if (ret)
goto err_disable_hw_free_clk;
ret = dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], true);
if (ret)
goto err_disable_hw_clk;
return 0;
err_disable_hw_clk:
iris_disable_unprepare_clock(core, IRIS_HW_CLK);
err_disable_hw_free_clk:
iris_disable_unprepare_clock(core, IRIS_HW_FREERUN_CLK);
err_disable_axi_clk:
@ -266,6 +260,7 @@ const struct vpu_ops iris_vpu3_ops = {
.power_off_controller = iris_vpu_power_off_controller,
.power_on_controller = iris_vpu_power_on_controller,
.calc_freq = iris_vpu3x_vpu4x_calculate_frequency,
.set_hwmode = iris_vpu_set_hwmode,
};
const struct vpu_ops iris_vpu33_ops = {
@ -274,6 +269,7 @@ const struct vpu_ops iris_vpu33_ops = {
.power_off_controller = iris_vpu33_power_off_controller,
.power_on_controller = iris_vpu_power_on_controller,
.calc_freq = iris_vpu3x_vpu4x_calculate_frequency,
.set_hwmode = iris_vpu_set_hwmode,
};
const struct vpu_ops iris_vpu35_ops = {
@ -283,4 +279,5 @@ const struct vpu_ops iris_vpu35_ops = {
.power_on_controller = iris_vpu35_vpu4x_power_on_controller,
.program_bootup_registers = iris_vpu35_vpu4x_program_bootup_registers,
.calc_freq = iris_vpu3x_vpu4x_calculate_frequency,
.set_hwmode = iris_vpu_set_hwmode,
};

24
drivers/media/platform/qcom/iris/iris_vpu4x.c
View File

@ -252,21 +252,10 @@ static int iris_vpu4x_power_on_hardware(struct iris_core *core)
ret = iris_vpu4x_power_on_apv(core);
if (ret)
goto disable_hw_clocks;
iris_vpu4x_ahb_sync_reset_apv(core);
}
iris_vpu4x_ahb_sync_reset_hardware(core);
ret = iris_vpu4x_genpd_set_hwmode(core, true, efuse_value);
if (ret)
goto disable_apv_power_domain;
return 0;
disable_apv_power_domain:
if (!(efuse_value & DISABLE_VIDEO_APV_BIT))
iris_vpu4x_power_off_apv(core);
disable_hw_clocks:
iris_vpu4x_disable_hardware_clocks(core, efuse_value);
disable_vpp1_power_domain:
@ -359,6 +348,18 @@ static void iris_vpu4x_power_off_hardware(struct iris_core *core)
iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]);
}
static int iris_vpu4x_set_hwmode(struct iris_core *core)
{
u32 efuse_value = readl(core->reg_base + WRAPPER_EFUSE_MONITOR);
if (!(efuse_value & DISABLE_VIDEO_APV_BIT))
iris_vpu4x_ahb_sync_reset_apv(core);
iris_vpu4x_ahb_sync_reset_hardware(core);
return iris_vpu4x_genpd_set_hwmode(core, true, efuse_value);
}
const struct vpu_ops iris_vpu4x_ops = {
.power_off_hw = iris_vpu4x_power_off_hardware,
.power_on_hw = iris_vpu4x_power_on_hardware,
@ -366,4 +367,5 @@ const struct vpu_ops iris_vpu4x_ops = {
.power_on_controller = iris_vpu35_vpu4x_power_on_controller,
.program_bootup_registers = iris_vpu35_vpu4x_program_bootup_registers,
.calc_freq = iris_vpu3x_vpu4x_calculate_frequency,
.set_hwmode = iris_vpu4x_set_hwmode,
};

2
drivers/media/platform/qcom/iris/iris_vpu_buffer.h
View File

@ -67,7 +67,7 @@ struct iris_inst;
#define SIZE_DOLBY_RPU_METADATA (41 * 1024)
#define H264_CABAC_HDR_RATIO_HD_TOT 1
#define H264_CABAC_RES_RATIO_HD_TOT 3
#define H265D_MAX_SLICE 1200
#define H265D_MAX_SLICE 3600
#define SIZE_H265D_HW_PIC_T SIZE_H264D_HW_PIC_T
#define H265_CABAC_HDR_RATIO_HD_TOT 2
#define H265_CABAC_RES_RATIO_HD_TOT 2

16
drivers/media/platform/qcom/iris/iris_vpu_common.c
View File

@ -292,14 +292,8 @@ int iris_vpu_power_on_hw(struct iris_core *core)
if (ret && ret != -ENOENT)
goto err_disable_hw_clock;
ret = dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], true);
if (ret)
goto err_disable_hw_ahb_clock;
return 0;
err_disable_hw_ahb_clock:
iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK);
err_disable_hw_clock:
iris_disable_unprepare_clock(core, IRIS_HW_CLK);
err_disable_power:
@ -308,6 +302,16 @@ int iris_vpu_power_on_hw(struct iris_core *core)
return ret;
}
int iris_vpu_set_hwmode(struct iris_core *core)
{
return dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], true);
}
int iris_vpu_switch_to_hwmode(struct iris_core *core)
{
return core->iris_platform_data->vpu_ops->set_hwmode(core);
}
int iris_vpu35_vpu4x_power_off_controller(struct iris_core *core)
{
u32 clk_rst_tbl_size = core->iris_platform_data->clk_rst_tbl_size;

3
drivers/media/platform/qcom/iris/iris_vpu_common.h
View File

@ -21,6 +21,7 @@ struct vpu_ops {
int (*power_on_controller)(struct iris_core *core);
void (*program_bootup_registers)(struct iris_core *core);
u64 (*calc_freq)(struct iris_inst *inst, size_t data_size);
int (*set_hwmode)(struct iris_core *core);
};
int iris_vpu_boot_firmware(struct iris_core *core);
@ -30,6 +31,8 @@ int iris_vpu_watchdog(struct iris_core *core, u32 intr_status);
int iris_vpu_prepare_pc(struct iris_core *core);
int iris_vpu_power_on_controller(struct iris_core *core);
int iris_vpu_power_on_hw(struct iris_core *core);
int iris_vpu_set_hwmode(struct iris_core *core);
int iris_vpu_switch_to_hwmode(struct iris_core *core);
int iris_vpu_power_on(struct iris_core *core);
int iris_vpu_power_off_controller(struct iris_core *core);
void iris_vpu_power_off_hw(struct iris_core *core);

2
drivers/media/platform/qcom/venus/Kconfig
View File

@ -4,7 +4,7 @@ config VIDEO_QCOM_VENUS
depends on VIDEO_DEV && QCOM_SMEM
depends on (ARCH_QCOM && ARM64 && IOMMU_API) || COMPILE_TEST
select OF_DYNAMIC if ARCH_QCOM
select QCOM_MDT_LOADER if ARCH_QCOM
select QCOM_MDT_LOADER
select QCOM_SCM
select VIDEOBUF2_DMA_CONTIG
select V4L2_MEM2MEM_DEV